Commit 9b5b2408 authored by Nabiullin, Oleg's avatar Nabiullin, Oleg Committed by Oleg Nabiullin

Update API to 1.26

Add MCTF, major refactoring of scene change detector, updated samples.
parent fcddb6bc
# Intel® Media SDK open source
**Whats new**
- Add MCTF support
- API 1.26
# Intel® Media SDK open source release v1.3!
**Whats new**
- Add SCD support
......
......@@ -6,7 +6,7 @@ Intel® Media SDK provides an API to access hardware-accelerated video decode, e
**Supported video pre-processing filters**: Color Conversion, Deinterlace, Denoise, Resize, Rotate
# Important note
The current version of Intel Media SDK compatible with the open source [Linux* Graphics Driver](https://github.com/intel/media-driver) [commit f7662547ab9cec5b98d144b0943067e2251825e8](https://github.com/intel/media-driver/commit/f7662547ab9cec5b98d144b0943067e2251825e8).
The current version of Intel Media SDK compatible with the open source [Linux* Graphics Driver](https://github.com/intel/media-driver).
Intel Media SDK depends on a special version of [LibVA commit df544cd5a31e54d4cbd33a391795a8747ddaf789](https://github.com/01org/libva/commit/df544cd5a31e54d4cbd33a391795a8747ddaf789).
# FAQ
......@@ -30,7 +30,7 @@ Intel Media SDK is licensed under MIT license. See [LICENSE](./LICENSE) for deta
See [CONTRIBUTING](./CONTRIBUTING.md) for details. Thank you!
# System requirements
**Operating System:** CentOS 7.3, Ubuntu 16.04.
**Operating System:** CentOS 7.4, Ubuntu 16.04.
**Hardware:**
Intel platforms with integrated graphics:
- Intel® Xeon® E3-1200 v4 family with C226 chipset
......
......@@ -25,8 +25,8 @@ set(MFX_ORIG_LDFLAGS "${MFX_LDFLAGS}" )
set(HEVC_FEI_Encoder_HW_GUID "5418a70666f94d5cb4f7b1caee86339b")
# Plugin version info
set (HEVC_FEI_HW_PRODUCT_NAME "Intel(R) Media Server Studio 2017 - HEVC FEI Encode")
set (HEVC_FEI_HW_DESCRIPTION "Intel(R) Media Server Studio 2017 - HEVC FEI Hardware Encode Plug-in")
set (HEVC_FEI_HW_PRODUCT_NAME "Intel(R) Media Server Studio 2018 - HEVC FEI Encode")
set (HEVC_FEI_HW_DESCRIPTION "Intel(R) Media Server Studio 2018 - HEVC FEI Hardware Encode Plug-in")
if( NOT DEFINED ENV{MFX_HEVC_VERSION} )
......
// Copyright (c) 2017 Intel Corporation
// Copyright (c) 2018 Intel Corporation
//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
......@@ -27,7 +27,6 @@
#include "mfx_h265_encode_hw_utils.h"
#include "mfx_h265_encode_hw_bs.h"
#include <memory>
#include <vector>
......@@ -46,14 +45,13 @@ static const GUID DXVA2_Intel_Encode_HEVC_Main =
GUID GetGUID(MfxVideoParam const & par);
mfxStatus HardcodeCaps(ENCODE_CAPS_HEVC& caps, MFXCoreInterface* pCore);
class DriverEncoder;
typedef enum tagENCODER_TYPE
{
ENCODER_DEFAULT = 0,
ENCODER_DEFAULT = 0
} ENCODER_TYPE;
DriverEncoder* CreatePlatformH265Encoder(MFXCoreInterface* core, ENCODER_TYPE type = ENCODER_DEFAULT);
......@@ -96,7 +94,7 @@ public:
virtual
mfxStatus Execute(
Task const &task,
mfxHDL surface) = 0;
mfxHDLPair pair) = 0;
virtual
mfxStatus QueryCompBufferInfo(
......
// Copyright (c) 2017 Intel Corporation
// Copyright (c) 2018 Intel Corporation
//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
......@@ -378,6 +378,7 @@ typedef struct _Task : DpbFrame
mfxU16 m_SkipMode;
}Task;
enum
......@@ -455,6 +456,7 @@ namespace ExtBuffer
#if defined(MFX_ENABLE_HEVCE_WEIGHTED_PREDICTION)
EXTBUF(mfxExtPredWeightTable, MFX_EXTBUFF_PRED_WEIGHT_TABLE);
#endif //defined(MFX_ENABLE_HEVCE_WEIGHTED_PREDICTION)
#undef EXTBUF
#define _CopyPar(dst, src, PAR) dst.PAR = src.PAR;
......@@ -471,6 +473,9 @@ namespace ExtBuffer
{
_CopyPar1(PicWidthInLumaSamples);
_CopyPar1(PicHeightInLumaSamples);
#if (MFX_VERSION >= 1026)
_CopyPar1(LCUSize);
#endif
}
inline void CopySupportedParams(mfxExtHEVCTiles& buf_dst, mfxExtHEVCTiles& buf_src)
......@@ -1062,7 +1067,7 @@ mfxStatus GetNativeHandleToRawSurface(
MFXCoreInterface & core,
MfxVideoParam const & video,
Task const & task,
mfxHDL & handle);
mfxHDLPair & handle);
mfxStatus CopyRawSurfaceToVideoMemory(
MFXCoreInterface & core,
......
// Copyright (c) 2017 Intel Corporation
// Copyright (c) 2018 Intel Corporation
//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
......@@ -221,7 +221,7 @@ mfxStatus SetSkipFrame(
virtual
mfxStatus Execute(
Task const & task,
mfxHDL surface);
mfxHDLPair pair);
virtual
mfxStatus QueryCompBufferInfo(
......
// Copyright (c) 2017 Intel Corporation
// Copyright (c) 2018 Intel Corporation
//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
......@@ -221,10 +221,11 @@ mfxStatus Plugin::InitImpl(mfxVideoParam *par)
m_ddi.reset( CreateHWh265Encoder(&m_core, ddiType) );
MFX_CHECK(m_ddi.get(), MFX_ERR_UNSUPPORTED);
GUID encoder_guid = GetGUID(m_vpar);
sts = m_ddi->CreateAuxilliaryDevice(
&m_core,
GetGUID(m_vpar),
encoder_guid,
m_vpar.m_ext.HEVCParam.PicWidthInLumaSamples,
m_vpar.m_ext.HEVCParam.PicHeightInLumaSamples);
MFX_CHECK(MFX_SUCCEEDED(sts), MFX_ERR_DEVICE_FAILED);
......@@ -648,6 +649,8 @@ mfxStatus Plugin::Reset(mfxVideoParam *par)
sts = CheckHeaders(parNew, m_caps);
MFX_CHECK_STS(sts);
MFX_CHECK(m_vpar.LCUSize == parNew.LCUSize, MFX_ERR_INCOMPATIBLE_VIDEO_PARAM); // LCU Size Can't be changed
MFX_CHECK(
parNew.mfx.CodecId == MFX_CODEC_HEVC
&& m_vpar.AsyncDepth == parNew.AsyncDepth
......@@ -750,7 +753,8 @@ mfxStatus Plugin::Reset(mfxVideoParam *par)
}
if (brcReset &&
m_vpar.mfx.RateControlMethod == MFX_RATECONTROL_CBR)
m_vpar.mfx.RateControlMethod == MFX_RATECONTROL_CBR &&
(parNew.HRDConformance || !isIdrRequired))
return MFX_ERR_INCOMPATIBLE_VIDEO_PARAM;
// waiting for submitted in driver tasks
......@@ -1024,7 +1028,7 @@ mfxStatus Plugin::Execute(mfxThreadTask thread_task, mfxU32 /*uid_p*/, mfxU32 /*
sts = CodeAsSkipFrame(m_core,m_vpar,*taskForExecute,m_rawSkip, m_rec);
MFX_CHECK_STS(sts);
}
sts = GetNativeHandleToRawSurface(m_core, m_vpar, *taskForExecute, surfaceHDL.first);
sts = GetNativeHandleToRawSurface(m_core, m_vpar, *taskForExecute, surfaceHDL);
MFX_CHECK_STS(sts);
if (!IsFrameToSkip(*taskForExecute, m_rec, m_vpar.isSWBRC()))
......@@ -1034,7 +1038,7 @@ mfxStatus Plugin::Execute(mfxThreadTask thread_task, mfxU32 /*uid_p*/, mfxU32 /*
}
ExtraTaskPreparation(*taskForExecute);
sts = m_ddi->Execute(*taskForExecute, surfaceHDL.first);
sts = m_ddi->Execute(*taskForExecute, surfaceHDL);
MFX_CHECK_STS(sts);
m_task.SubmitForQuery(taskForExecute);
......
// Copyright (c) 2017 Intel Corporation
// Copyright (c) 2018 Intel Corporation
//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
......@@ -766,7 +766,6 @@ mfxU32 GetDefaultLCUSize(MfxVideoParam const & par,
return LCUSize;
}
#ifdef MFX_ENABLE_HEVCE_ROI
mfxStatus CheckAndFixRoi(MfxVideoParam const & par, ENCODE_CAPS_HEVC const & caps, mfxExtEncoderROI *ROI, bool &bROIViaMBQP)
{
......@@ -1140,7 +1139,7 @@ mfxStatus CheckVideoParam(MfxVideoParam& par, ENCODE_CAPS_HEVC const & caps, boo
changed += CheckTriStateOption(par.mfx.LowPower);
if (!par.LCUSize)
par.LCUSize = GetDefaultLCUSize(par, caps);
par.LCUSize = GetDefaultLCUSize(par, caps); // that a local copy of actual value;
if (caps.BitDepth8Only == 0) // 10-bit supported
{
......@@ -1219,7 +1218,7 @@ mfxStatus CheckVideoParam(MfxVideoParam& par, ENCODE_CAPS_HEVC const & caps, boo
if (par.mfx.TargetUsage && caps.TUSupport)
changed += CheckTU(caps.TUSupport, par.mfx.TargetUsage);
changed += CheckMax(par.mfx.GopRefDist, (caps.SliceIPOnly || IsOn(par.mfx.LowPower)) ? 1 : (par.mfx.GopPicSize ? par.mfx.GopPicSize - 1 : 0xFFFF));
changed += CheckMax(par.mfx.GopRefDist, (caps.SliceIPOnly || IsOn(par.mfx.LowPower)) ? 1 : (par.mfx.GopPicSize ? Max(1, par.mfx.GopPicSize - 1) : 0xFFFF));
invalid += CheckOption(par.Protected
, 0);
......@@ -1274,7 +1273,7 @@ mfxStatus CheckVideoParam(MfxVideoParam& par, ENCODE_CAPS_HEVC const & caps, boo
if (caps.MBBRCSupport == 0 || par.mfx.RateControlMethod == MFX_RATECONTROL_CQP ||par.isSWBRC())
changed += CheckOption(par.m_ext.CO2.MBBRC, (mfxU32)MFX_CODINGOPTION_OFF, 0);
else
changed += CheckOption(par.m_ext.CO2.MBBRC, (mfxU32)MFX_CODINGOPTION_ON, 0);
changed += CheckOption(par.m_ext.CO2.MBBRC, (mfxU32)MFX_CODINGOPTION_ON, (mfxU32)MFX_CODINGOPTION_OFF, 0);
if (IsOn(par.m_ext.CO2.ExtBRC) && par.mfx.RateControlMethod != 0 && par.mfx.RateControlMethod != MFX_RATECONTROL_CBR && par.mfx.RateControlMethod != MFX_RATECONTROL_VBR)
......@@ -1442,7 +1441,8 @@ mfxStatus CheckVideoParam(MfxVideoParam& par, ENCODE_CAPS_HEVC const & caps, boo
mfxU32 nLCU = CeilDiv(par.m_ext.HEVCParam.PicHeightInLumaSamples, par.LCUSize) * CeilDiv(par.m_ext.HEVCParam.PicWidthInLumaSamples, par.LCUSize);
mfxU32 nTile = Max<mfxU32>(par.m_ext.HEVCTiles.NumTileColumns, 1) * Max<mfxU32>(par.m_ext.HEVCTiles.NumTileRows, 1);
changed += CheckRange(par.m_ext.CO2.NumMbPerSlice, 0, nLCU / nTile);
mfxU32 minNumMbPerSlice = CeilDiv(nLCU, MAX_SLICES) / nTile;
changed += CheckRange(par.m_ext.CO2.NumMbPerSlice, minNumMbPerSlice, nLCU / nTile);
}
changed += CheckOption(par.mfx.NumSlice, MakeSlices(par, caps.SliceStructure), 0);
......@@ -1591,11 +1591,13 @@ mfxStatus CheckVideoParam(MfxVideoParam& par, ENCODE_CAPS_HEVC const & caps, boo
}
}
//check Active Reference
{
mfxU16 maxForward = Min<mfxU16>(caps.MaxNum_Reference0, maxDPB);
mfxU16 maxBackward = Min<mfxU16>(caps.MaxNum_Reference1, maxDPB);
changed += CheckMax(par.m_ext.DDI.NumActiveRefP, maxForward);
changed += CheckMax(par.m_ext.DDI.NumActiveRefBL0, maxForward);
changed += CheckMax(par.m_ext.DDI.NumActiveRefBL1, maxBackward);
......@@ -1766,8 +1768,7 @@ void SetDefaults(
mfxExtCodingOption2& CO2 = par.m_ext.CO2;
mfxExtCodingOption3& CO3 = par.m_ext.CO3;
if (!par.LCUSize)
par.LCUSize = GetDefaultLCUSize(par, hwCaps);
if (par.mfx.CodecLevel)
{
......@@ -1917,7 +1918,6 @@ void SetDefaults(
if (!par.mfx.GopRefDist)
{
if (par.isTL() || hwCaps.SliceIPOnly || IsOn(par.mfx.LowPower) || par.mfx.GopPicSize < 3 || par.mfx.NumRefFrame == 1)
......@@ -1934,9 +1934,6 @@ void SetDefaults(
par.m_ext.CO2.BRefType = MFX_B_REF_OFF;
}
if (par.m_ext.CO2.ExtBRC == MFX_CODINGOPTION_UNKNOWN)
par.m_ext.CO2.ExtBRC = MFX_CODINGOPTION_OFF;
{
// calculate ActiveReference
......@@ -1965,8 +1962,9 @@ void SetDefaults(
if (!RefActiveBL1)
RefActiveBL1 = (par.mfx.TargetUsage == 7) ? 1 :
par.mfx.NumRefFrame ? Min<mfxU16>(hwCaps.MaxNum_Reference1, par.mfx.NumRefFrame) : hwCaps.MaxNum_Reference1;
//set ActiveReference
//set ActiveReference
if (!par.m_ext.DDI.NumActiveRefP)
par.m_ext.DDI.NumActiveRefP = RefActiveP;
......@@ -2017,6 +2015,9 @@ void SetDefaults(
par.mfx.NumRefFrame = Min(maxDPB, par.mfx.NumRefFrame);
}
}
if (par.m_ext.CO2.ExtBRC == MFX_CODINGOPTION_UNKNOWN)
par.m_ext.CO2.ExtBRC = MFX_CODINGOPTION_OFF;
if (par.m_ext.CO3.PRefType == MFX_P_REF_DEFAULT)
{
if (par.mfx.GopRefDist == 1 && (par.mfx.RateControlMethod == MFX_RATECONTROL_CQP || par.isSWBRC()))
......@@ -2078,7 +2079,7 @@ void SetDefaults(
if (IsOff(CO3.EnableQPOffset))
Zero(CO3.QPOffset);
if (CO3.EnableMBQP == 0)
......
// Copyright (c) 2017 Intel Corporation
// Copyright (c) 2018 Intel Corporation
//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
......@@ -109,6 +109,7 @@ mfxU8 GetPFrameLevel(mfxU32 i, mfxU32 num)
}
return (mfxU8)level;
}
mfxU8 PLayer(
mfxU32 order, // (task.m_poc - prevTask.m_lastIPoc)
MfxVideoParam const & par)
......@@ -420,25 +421,26 @@ mfxStatus GetNativeHandleToRawSurface(
MFXCoreInterface & core,
MfxVideoParam const & video,
Task const & task,
mfxHDL & nativeHandle)
mfxHDLPair & handle)
{
mfxStatus sts = MFX_ERR_NONE;
mfxFrameAllocator & fa = core.FrameAllocator();
mfxExtOpaqueSurfaceAlloc const & opaq = video.m_ext.Opaque;
mfxFrameSurface1 * surface = task.m_surf_real;
nativeHandle = 0;
Zero(handle);
mfxHDL * nativeHandle = &handle.first;
if ( video.IOPattern == MFX_IOPATTERN_IN_SYSTEM_MEMORY
|| (video.IOPattern == MFX_IOPATTERN_IN_OPAQUE_MEMORY && (opaq.In.Type & MFX_MEMTYPE_SYSTEM_MEMORY)))
sts = fa.GetHDL(fa.pthis, task.m_midRaw, &nativeHandle);
sts = fa.GetHDL(fa.pthis, task.m_midRaw, nativeHandle);
else if ( video.IOPattern == MFX_IOPATTERN_IN_VIDEO_MEMORY
|| video.IOPattern == MFX_IOPATTERN_IN_OPAQUE_MEMORY)
{
if (task.m_midRaw == NULL)
sts = core.GetFrameHandle(&surface->Data, &nativeHandle);
sts = core.GetFrameHandle(&surface->Data, nativeHandle);
else
sts = fa.GetHDL(fa.pthis, task.m_midRaw, &nativeHandle);
sts = fa.GetHDL(fa.pthis, task.m_midRaw, nativeHandle);
}
else
return (MFX_ERR_UNDEFINED_BEHAVIOR);
......@@ -697,7 +699,6 @@ mfxStatus MfxVideoParam::GetExtBuffers(mfxVideoParam& par, bool query)
ExtBuffer::Set(par, m_ext.CO);
ExtBuffer::Set(par, m_ext.CO2);
ExtBuffer::Set(par, m_ext.CO3);
ExtBuffer::Set(par, m_ext.ResetOpt);
if (ExtBuffer::Set(par, m_ext.DDI))
......@@ -1619,6 +1620,7 @@ void MfxVideoParam::SyncMfxToHeadersParam(mfxU32 numSlicesForSTRPSOpt)
}
Zero(m_pps);
m_pps.seq_parameter_set_id = m_sps.seq_parameter_set_id;
......@@ -1708,6 +1710,7 @@ void MfxVideoParam::SyncMfxToHeadersParam(mfxU32 numSlicesForSTRPSOpt)
m_pps.log2_parallel_merge_level_minus2 = 0;
m_pps.slice_segment_header_extension_present_flag = 0;
}
mfxU16 FrameType2SliceType(mfxU32 ft)
......@@ -2113,7 +2116,7 @@ mfxStatus MfxVideoParam::GetSliceHeader(Task const & task, Task const & prevTask
}
}
s.loop_filter_across_slices_enabled_flag = 0;
s.loop_filter_across_slices_enabled_flag = m_pps.loop_filter_across_slices_enabled_flag;
if (m_pps.tiles_enabled_flag || m_pps.entropy_coding_sync_enabled_flag)
{
......
// Copyright (c) 2017 Intel Corporation
// Copyright (c) 2018 Intel Corporation
//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
......@@ -1227,13 +1227,13 @@ mfxStatus SetSkipFrame(
return MFX_ERR_NONE;
}
mfxStatus VAAPIEncoder::Execute(Task const & task, mfxHDL surface)
mfxStatus VAAPIEncoder::Execute(Task const & task, mfxHDLPair pair)
{
MFX_AUTO_LTRACE(MFX_TRACE_LEVEL_HOTSPOTS, "VAAPIEncoder::Execute");
VAEncPackedHeaderParameterBuffer packed_header_param_buffer;
VASurfaceID reconSurface;
VASurfaceID *inputSurface = (VASurfaceID*)surface;
VASurfaceID *inputSurface = (VASurfaceID*)pair.first;
VABufferID codedBuffer;
mfxU32 i;
mfxU32 packedDataSize = 0;
......
# Copyright (c) 2017-2018 Intel Corporation
# Copyright (c) 2018 Intel Corporation
#
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
......@@ -46,6 +46,7 @@ foreach( prefix ${MSDK_LIB_ROOT}/shared/src )
${prefix}/mfx_enc_common.cpp
${prefix}/mfx_mpeg2_dec_common.cpp
${prefix}/mfx_critical_error_handler.cpp
${prefix}/mfx_vpx_dec_common.cpp
)
endforeach()
......@@ -74,10 +75,8 @@ set( defs "" )
### libmfxhw
list( APPEND mdirs
scheduler vpp decode/vc1
decode/mjpeg decode/h264 decode/mpeg2
cmrt_cross_platform encode_hw/h264
encode_hw/mpeg2 encode_hw/mjpeg
genx/copy_kernels
decode/mjpeg decode/h264 decode/mpeg2 cmrt_cross_platform encode_hw/h264 encode_hw/mpeg2 encode_hw/mjpeg
decode/h265 decode/vp8 decode/vp9 mctf_package/mctf
)
include_directories( ${MSDK_LIB_ROOT}/fei/h264_common )
include_directories( ${MSDK_LIB_ROOT}/fei/h264_preenc )
......@@ -87,6 +86,9 @@ foreach( dir ${mdirs} )
include_directories( ${MSDK_LIB_ROOT}/${dir}/include )
endforeach()
include_directories( ${MSDK_LIB_ROOT}/genx/copy_kernels/include )
include_directories( ${MSDK_STUDIO_ROOT}/shared/asc/include )
list( APPEND cdirs
brc h264_enc mpeg2_dec vc1_dec vc1_common
)
......@@ -137,9 +139,17 @@ foreach( prefix ${MSDK_STUDIO_ROOT}/shared/src )
${prefix}/mfx_mfe_adapter.cpp
)
endforeach()
foreach( prefix ${MSDK_LIB_ROOT}/genx/copy_kernels/src )
list( APPEND sources
${prefix}/genx_cht_copy_isa.cpp
${prefix}/genx_skl_copy_isa.cpp
)
endforeach()
foreach( prefix ${MSDK_LIB_ROOT}/genx/field_copy/src )
list( APPEND sources
${prefix}/genx_fcopy_cmcode_isa.cpp
${prefix}/genx_fcopy_gen8_isa.cpp
${prefix}/genx_fcopy_gen9_isa.cpp
)
endforeach()
......@@ -172,9 +182,10 @@ list( APPEND LIBS
encode_hw
h264_la
genx_h264_encode_embeded
genx_copy_kernels
mfx_common
mfx_common_hw
asc
mctf_hw
vpp_hw
h264_common
h264_preenc
......@@ -182,6 +193,7 @@ list( APPEND LIBS
h264_pak
vc1_common
vc1_dec_hw
umc_h265_hw
${ITT_LIBS}
pthread
dl
......
// Copyright (c) 2017 Intel Corporation
// Copyright (c) 2018 Intel Corporation
//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
......@@ -134,6 +134,14 @@ struct ID3D11Device;
#include <iostream>
typedef int BOOL;
#ifndef FALSE
#define FALSE 0
#endif
#ifndef TRUE
#define TRUE 1
#endif
typedef char byte;
typedef unsigned char BYTE;
typedef unsigned int UINT32;
......
// Copyright (c) 2017 Intel Corporation
// Copyright (c) 2018 Intel Corporation
//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
......@@ -592,8 +592,12 @@ mfxStatus VideoDECODEMJPEG::QueryIOSurfInternal(VideoCORE *core, mfxVideoParam *
mfxFrameAllocRequest request_internal = *request;
VideoDECODEMJPEGBase_HW::AdjustFourCC(&request_internal.Info, &par->mfx, core->GetHWType(), core->GetVAType(), &needVpp);
if (needVpp && MFX_HW_D3D11 == core->GetVAType())
{
request->Type |= MFX_MEMTYPE_DXVA2_PROCESSOR_TARGET;
request->Type |= MFX_MEMTYPE_FROM_VPPOUT;
}
else
request->Type |= MFX_MEMTYPE_DXVA2_DECODER_TARGET;
......@@ -1457,7 +1461,11 @@ mfxStatus VideoDECODEMJPEG::UpdateAllocRequest(mfxVideoParam *par,
if (request->NumFrameMin > pOpaqAlloc->Out.NumSurface)
return MFX_ERR_INVALID_VIDEO_PARAM;
request->Type = MFX_MEMTYPE_OPAQUE_FRAME | MFX_MEMTYPE_FROM_DECODE;
if (pOpaqAlloc->Out.Type & MFX_MEMTYPE_FROM_VPPOUT)
request->Type = MFX_MEMTYPE_OPAQUE_FRAME | MFX_MEMTYPE_FROM_VPPOUT;
else
request->Type = MFX_MEMTYPE_OPAQUE_FRAME | MFX_MEMTYPE_FROM_DECODE;
switch (pOpaqAlloc->Out.Type & (MFX_MEMTYPE_DXVA2_DECODER_TARGET|MFX_MEMTYPE_SYSTEM_MEMORY|MFX_MEMTYPE_DXVA2_PROCESSOR_TARGET))
{
case MFX_MEMTYPE_SYSTEM_MEMORY:
......@@ -1750,7 +1758,8 @@ mfxU32 VideoDECODEMJPEGBase_HW::AdjustFrameAllocRequest(mfxFrameAllocRequest *re
if (request->Type & MFX_MEMTYPE_VIDEO_MEMORY_PROCESSOR_TARGET)
{
request->Type -= MFX_MEMTYPE_VIDEO_MEMORY_PROCESSOR_TARGET;
request->Type = request->Type &~ MFX_MEMTYPE_VIDEO_MEMORY_PROCESSOR_TARGET;
request->Type = request->Type &~ MFX_MEMTYPE_FROM_VPPOUT;
}
request->Type |= MFX_MEMTYPE_VIDEO_MEMORY_DECODER_TARGET;
}
......@@ -1830,6 +1839,8 @@ void VideoDECODEMJPEGBase_HW::AdjustFourCC(mfxFrameInfo *requestFrameInfo, mfxIn
mfxStatus VideoDECODEMJPEGBase_HW::RunThread(void *params, mfxU32 threadNumber, mfxU32 )
{
mfxStatus mfxSts = MFX_ERR_NONE;
MFX_CHECK_NULL_PTR1(params);
ThreadTaskInfo * info = (ThreadTaskInfo *)params;
if (m_needVpp)
......
// Copyright (c) 2017 Intel Corporation
// Copyright (c) 2018 Intel Corporation
//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
......@@ -1375,7 +1375,7 @@ mfxStatus VideoDECODEVP8_HW::GetFrame(MediaData* /*in*/, FrameData** /*out*/)
mfxTaskThreadingPolicy VideoDECODEVP8_HW::GetThreadingPolicy()
{
return MFX_TASK_THREADING_DEDICATED;
return MFX_TASK_THREADING_INTRA;
}
mfxStatus VideoDECODEVP8_HW::GetVideoParam(mfxVideoParam *pPar)
......
# Copyright (c) 2017 Intel Corporation
# Copyright (c) 2018 Intel Corporation
#
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
......@@ -33,6 +33,7 @@ include_directories( ${MSDK_LIB_ROOT}/enc_hw/mpeg2/include )
include_directories( ${MSDK_LIB_ROOT}/pak/mpeg2/include )
include_directories( ${MSDK_LIB_ROOT}/genx/h264_encode/include )
include_directories( ${MSDK_LIB_ROOT}/fei/h264_preenc )
include_directories( ${MSDK_STUDIO_ROOT}/shared/asc/include )
# umc codec
include_directories( ${MSDK_UMC_ROOT}/codec/brc/include )
include_directories( ${MSDK_UMC_ROOT}/codec/jpeg_common/include )
......
// Copyright (c) 2017 Intel Corporation
// Copyright (c) 2018 Intel Corporation
//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
......@@ -183,8 +183,13 @@ CmSurface2D * CreateSurface2DSubresource(CmDevice * device, ID3D11Texture2D * d3
CmSurface2D * CreateSurface(CmDevice * device, mfxHDL nativeSurface, eMFXVAType vatype);
CmSurface2D * CreateSurface(CmDevice * device, mfxHDLPair nativeSurfaceIndexPair, eMFXVAType vatype);
CmSurface2D * CreateSurface(CmDevice * device, mfxU32 width, mfxU32 height, mfxU32 fourcc);
CmSurface2DUP * CreateSurface(CmDevice * device, void *mem, mfxU32 width, mfxU32 height, mfxU32 fourcc);
SurfaceIndex * CreateVmeSurfaceG75(
CmDevice * device,
CmSurface2D * source,
......
// Copyright (c) 2017-2018 Intel Corporation
// Copyright (c) 2018 Intel Corporation
//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
......@@ -17,7 +17,6 @@
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
// SOFTWARE.
#include "mfx_common.h"
#ifdef MFX_ENABLE_H264_VIDEO_ENCODE_HW
......@@ -36,9 +35,8 @@
#include "mfx_h264_encode_interface.h"
#include "mfx_h264_encode_cm.h"
#include "vm_time.h"
//#include "asc.h"
// Copy of SCD, using MfxHwH264Encode namespace, remove when SCD avaiable in MSDK
#include "mfx_h264_scd.h"
#include "asc.h"
#ifndef _MFX_H264_ENCODE_HW_UTILS_H_
#define _MFX_H264_ENCODE_HW_UTILS_H_
......@@ -343,6 +341,17 @@ namespace MfxHwH264Encode
CmDevice * device,
mfxFrameAllocRequest & req);
mfxStatus AllocCmSurfacesUP(
CmDevice * device,
mfxFrameAllocRequest & req);
mfxStatus AllocFrames(
VideoCORE * core,
mfxFrameAllocRequest & req);
mfxStatus UpdateResourcePointers(
mfxU32 idxScd,
void * memY,
void * gpuSurf);