Commit 077df3f3 authored by David Paleino's avatar David Paleino

Imported Upstream version 1.1+ds1

parent 23f30278
OBJECTS = x86-common.o
CFLAGS = -O2 -Wall -DDEBUG -g
CFLAGS ?= -O2 -Wall -DDEBUG -g
LIBDIR ?= /usr/lib
ifeq ($(BACKEND), x86emu)
ifeq ($(BACKEND),x86emu)
OBJECTS += thunk.o x86emu/decode.o x86emu/debug.o x86emu/fpu.o \
x86emu/ops.o x86emu/ops2.o x86emu/prim_ops.o x86emu/sys.o
else
OBJECTS += lrmi.o
endif
ifeq ($(LIBRARY), shared)
ifeq ($(LIBRARY),shared)
CFLAGS += -fPIC
endif
......@@ -31,7 +32,7 @@ clean: objclean
rm -f *.so.1 *.a
install: libx86.so.1
install -D libx86.so.1 $(DESTDIR)/usr/lib/libx86.so.1
install -D libx86.a $(DESTDIR)/usr/lib/libx86.a
ln -sf /usr/lib/libx86.so.1 $(DESTDIR)/usr/lib/libx86.so
install -D lrmi.h $(DESTDIR)/usr/include/libx86.h
install -D libx86.so.1 $(DESTDIR)$(LIBDIR)/libx86.so.1
install -D libx86.a $(DESTDIR)$(LIBDIR)/libx86.a
ln -sf libx86.so.1 $(DESTDIR)$(LIBDIR)/libx86.so
install -p -m 0644 -D lrmi.h $(DESTDIR)/usr/include/libx86.h
......@@ -25,7 +25,9 @@
#include "lrmi.h"
#include "x86-common.h"
#ifndef DEBUG
#define DEBUG
#endif
#define ALLOC_ENTRIES(x) (V_RAM - 1)
#define TRUE 1
#define FALSE 0
......
......@@ -232,7 +232,7 @@ int LRMI_common_init(void)
}
m = mmap((void *)0xa0000, 0x100000 - 0xa0000,
PROT_READ | PROT_WRITE,
PROT_READ | PROT_WRITE | PROT_EXEC,
MAP_FIXED | MAP_SHARED, fd_mem, 0xa0000);
if (m == (void *)-1) {
......
......@@ -47,7 +47,7 @@ $(TARGETLIB): $(OBJS)
ar rv $(TARGETLIB) $(OBJS)
INCS = -I. -Ix86emu -I../../include -I../x86emu_include
CFLAGS = -fPIC -D__DRIVER__ -DFORCE_POST -D_CEXPORT= -DNO_LONG_LONG -DDEBUG
CFLAGS += -fPIC -D__DRIVER__ -DFORCE_POST -D_CEXPORT= -DNO_LONG_LONG -DDEBUG
.c.o:
gcc -g -O -Wall -c $(CFLAGS) $(INCS) $*.c
......
......@@ -63,6 +63,40 @@ static void x86emuOp2_illegal_op(
#define xorl(a,b) ((a) && !(b)) || (!(a) && (b))
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x31
****************************************************************************/
static void x86emuOp2_rdtsc(u8 X86EMU_UNUSED(op2))
{
#ifdef __HAS_LONG_LONG__
static u64 counter = 0;
#else
static u32 counter = 0;
#endif
counter += 0x10000;
/* read timestamp counter */
/*
* Note that instead of actually trying to accurately measure this, we just
* increase the counter by a fixed amount every time we hit one of these
* instructions. Feel free to come up with a better method.
*/
START_OF_INSTR();
DECODE_PRINTF("RDTSC\n");
TRACE_AND_STEP();
#ifdef __HAS_LONG_LONG__
M.x86.R_EAX = counter & 0xffffffff;
M.x86.R_EDX = counter >> 32;
#else
M.x86.R_EAX = counter;
M.x86.R_EDX = 0;
#endif
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0x80-0x8F
......@@ -293,6 +327,20 @@ static void x86emuOp2_pop_FS(u8 X86EMU_UNUSED(op2))
END_OF_INSTR();
}
/****************************************************************************
REMARKS: CPUID takes EAX/ECX as inputs, writes EAX/EBX/ECX/EDX as output
Handles opcode 0x0f,0xa2
****************************************************************************/
static void x86emuOp2_cpuid(u8 X86EMU_UNUSED(op2))
{
START_OF_INSTR();
DECODE_PRINTF("CPUID\n");
TRACE_AND_STEP();
cpuid();
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
}
/****************************************************************************
REMARKS:
Handles opcode 0x0f,0xa3
......@@ -2129,7 +2177,7 @@ static void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
uint srcoffset;
START_OF_INSTR();
DECODE_PRINTF("BSF\n");
DECODE_PRINTF("BSF\t");
FETCH_DECODE_MODRM(mod, rh, rl);
switch(mod) {
case 0:
......@@ -2209,25 +2257,25 @@ static void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
break;
case 3: /* register to register */
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *srcreg, *dstreg;
u32 srcval, *dstreg;
srcreg = DECODE_RM_LONG_REGISTER(rl);
srcval = *DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
if ((*srcreg >> *dstreg) & 1) break;
if ((srcval >> *dstreg) & 1) break;
} else {
u16 *srcreg, *dstreg;
u16 srcval, *dstreg;
srcreg = DECODE_RM_WORD_REGISTER(rl);
srcval = *DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
if ((*srcreg >> *dstreg) & 1) break;
if ((srcval >> *dstreg) & 1) break;
}
break;
}
......@@ -2245,7 +2293,7 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
uint srcoffset;
START_OF_INSTR();
DECODE_PRINTF("BSF\n");
DECODE_PRINTF("BSR\t");
FETCH_DECODE_MODRM(mod, rh, rl);
switch(mod) {
case 0:
......@@ -2325,25 +2373,25 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
break;
case 3: /* register to register */
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *srcreg, *dstreg;
u32 srcval, *dstreg;
srcreg = DECODE_RM_LONG_REGISTER(rl);
srcval = *DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_LONG_REGISTER(rh);
TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
if ((*srcreg >> *dstreg) & 1) break;
if ((srcval >> *dstreg) & 1) break;
} else {
u16 *srcreg, *dstreg;
u16 srcval, *dstreg;
srcreg = DECODE_RM_WORD_REGISTER(rl);
srcval = *DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
dstreg = DECODE_RM_WORD_REGISTER(rh);
TRACE_AND_STEP();
CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
if ((*srcreg >> *dstreg) & 1) break;
if ((srcval >> *dstreg) & 1) break;
}
break;
}
......@@ -2580,7 +2628,7 @@ void (*x86emu_optab2[256])(u8) =
/* 0x2f */ x86emuOp2_illegal_op,
/* 0x30 */ x86emuOp2_illegal_op,
/* 0x31 */ x86emuOp2_illegal_op,
/* 0x31 */ x86emuOp2_rdtsc,
/* 0x32 */ x86emuOp2_illegal_op,
/* 0x33 */ x86emuOp2_illegal_op,
/* 0x34 */ x86emuOp2_illegal_op,
......@@ -2700,7 +2748,7 @@ void (*x86emu_optab2[256])(u8) =
/* 0xa0 */ x86emuOp2_push_FS,
/* 0xa1 */ x86emuOp2_pop_FS,
/* 0xa2 */ x86emuOp2_illegal_op,
/* 0xa2 */ x86emuOp2_cpuid,
/* 0xa3 */ x86emuOp2_bt_R,
/* 0xa4 */ x86emuOp2_shld_IMM,
/* 0xa5 */ x86emuOp2_shld_CL,
......
......@@ -100,6 +100,12 @@
#define PRIM_OPS_NO_REDEFINE_ASM
#include "x86emu/x86emui.h"
#if defined(__GNUC__)
# if defined (__i386__) || defined(__i386) || defined(__AMD64__) || defined(__x86_64__) || defined(__amd64__)
# include "x86emu/prim_x86_gcc.h"
# endif
#endif
/*------------------------- Global Variables ------------------------------*/
#ifndef __HAVE_INLINE_ASSEMBLER__
......@@ -2086,7 +2092,7 @@ Implements the IMUL instruction and side effects.
void imul_long_direct(u32 *res_lo, u32* res_hi,u32 d, u32 s)
{
#ifdef __HAS_LONG_LONG__
s64 res = (s32)d * (s32)s;
s64 res = (s64)(s32)d * (s32)s;
*res_lo = (u32)res;
*res_hi = (u32)(res >> 32);
......@@ -2178,7 +2184,7 @@ Implements the MUL instruction and side effects.
void mul_long(u32 s)
{
#ifdef __HAS_LONG_LONG__
u64 res = (u32)M.x86.R_EAX * (u32)s;
u64 res = (u64)M.x86.R_EAX * s;
M.x86.R_EAX = (u32)res;
M.x86.R_EDX = (u32)(res >> 32);
......@@ -2660,6 +2666,67 @@ DB( if (CHECK_SP_ACCESS())
return res;
}
/****************************************************************************
REMARKS:
CPUID takes EAX/ECX as inputs, writes EAX/EBX/ECX/EDX as output
****************************************************************************/
void cpuid (void)
{
u32 feature = M.x86.R_EAX;
#ifdef X86EMU_HAS_HW_CPUID
/* If the platform allows it, we will base our values on the real
* results from the CPUID instruction. We limit support to the
* first two features, and the results of those are sanitized.
*/
if (feature <= 1)
hw_cpuid(&M.x86.R_EAX, &M.x86.R_EBX, &M.x86.R_ECX, &M.x86.R_EDX);
#endif
switch (feature) {
case 0:
/* Regardless if we have real data from the hardware, the emulator
* will only support upto feature 1, which we set in register EAX.
* Registers EBX:EDX:ECX contain a string identifying the CPU.
*/
M.x86.R_EAX = 1;
#ifndef X86EMU_HAS_HW_CPUID
/* EBX:EDX:ECX = "GenuineIntel" */
M.x86.R_EBX = 0x756e6547;
M.x86.R_EDX = 0x49656e69;
M.x86.R_ECX = 0x6c65746e;
#endif
break;
case 1:
#ifndef X86EMU_HAS_HW_CPUID
/* If we don't have x86 compatible hardware, we return values from an
* Intel 486dx4; which was one of the first processors to have CPUID.
*/
M.x86.R_EAX = 0x00000480;
M.x86.R_EBX = 0x00000000;
M.x86.R_ECX = 0x00000000;
M.x86.R_EDX = 0x00000002; /* VME */
#else
/* In the case that we have hardware CPUID instruction, we make sure
* that the features reported are limited to TSC and VME.
*/
M.x86.R_EDX &= 0x00000012;
#endif
break;
default:
/* Finally, we don't support any additional features. Most CPUs
* return all zeros when queried for invalid or unsupported feature
* numbers.
*/
M.x86.R_EAX = 0;
M.x86.R_EBX = 0;
M.x86.R_ECX = 0;
M.x86.R_EDX = 0;
break;
}
}
#ifdef __HAVE_INLINE_ASSEMBLER__
u16 aaa_word (u16 d)
......
......@@ -50,6 +50,12 @@
#else
#include <string.h>
#endif
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <sys/mman.h>
/*------------------------- Global Variables ------------------------------*/
X86EMU_sysEnv _X86EMU_env; /* Global emulator machine state */
......@@ -212,6 +218,17 @@ static __inline__ void stw_u(unsigned long r5, unsigned short * r11)
}
#endif
u32 mmap_read (off_t addr, u8 size) {
u32 value;
int fd = open ("/dev/mem", O_RDWR);
int offset = addr % 4096;
void *identity = mmap(NULL, 8192, PROT_READ, MAP_PRIVATE, fd, (addr-offset));
memcpy (&value, identity+offset, size);
munmap (identity, 8192);
return value;
}
/****************************************************************************
PARAMETERS:
addr - Emulator memory address to read
......@@ -227,11 +244,10 @@ u8 X86API rdb(
{
u8 val;
if (addr > M.mem_size - 1) {
DB(printk("mem_read: address %#lx out of range!\n", addr);)
HALT_SYS();
}
val = *(u8*)(M.mem_base + addr);
if (addr > M.mem_size - 1)
val = mmap_read (addr, 1);
else
val = *(u8*)(M.mem_base + addr);
DB( if (DEBUG_MEM_TRACE())
printk("%#08x 1 -> %#x\n", addr, val);)
return val;
......@@ -252,23 +268,23 @@ u16 X86API rdw(
{
u16 val = 0;
if (addr > M.mem_size - 2) {
DB(printk("mem_read: address %#lx out of range!\n", addr);)
HALT_SYS();
}
if (addr > M.mem_size - 2)
val = mmap_read (addr, 2);
else {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
val = (*(u8*)(M.mem_base + addr) |
(*(u8*)(M.mem_base + addr + 1) << 8));
}
else
if (addr & 0x1) {
val = (*(u8*)(M.mem_base + addr) |
(*(u8*)(M.mem_base + addr + 1) << 8));
}
else
#endif
#if defined(__alpha__) || defined(__alpha)
val = ldw_u((u16*)(M.mem_base + addr));
val = ldw_u((u16*)(M.mem_base + addr));
#else
val = *(u16*)(M.mem_base + addr);
val = *(u16*)(M.mem_base + addr);
#endif
DB( if (DEBUG_MEM_TRACE())
}
DB( if (DEBUG_MEM_TRACE())
printk("%#08x 2 -> %#x\n", addr, val);)
return val;
}
......@@ -287,27 +303,27 @@ u32 X86API rdl(
{
u32 val = 0;
if (addr > M.mem_size - 4) {
DB(printk("mem_read: address %#lx out of range!\n", addr);)
HALT_SYS();
}
if (addr > M.mem_size - 4)
val = mmap_read (addr, 4);
else {
#ifdef __BIG_ENDIAN__
if (addr & 0x3) {
val = (*(u8*)(M.mem_base + addr + 0) |
(*(u8*)(M.mem_base + addr + 1) << 8) |
(*(u8*)(M.mem_base + addr + 2) << 16) |
(*(u8*)(M.mem_base + addr + 3) << 24));
}
else
if (addr & 0x3) {
val = (*(u8*)(M.mem_base + addr + 0) |
(*(u8*)(M.mem_base + addr + 1) << 8) |
(*(u8*)(M.mem_base + addr + 2) << 16) |
(*(u8*)(M.mem_base + addr + 3) << 24));
}
else
#endif
#if defined(__alpha__) || defined(__alpha)
val = ldl_u((u32*)(M.mem_base + addr));
val = ldl_u((u32*)(M.mem_base + addr));
#else
val = *(u32*)(M.mem_base + addr);
val = *(u32*)(M.mem_base + addr);
#endif
DB( if (DEBUG_MEM_TRACE())
}
DB( if (DEBUG_MEM_TRACE())
printk("%#08x 4 -> %#x\n", addr, val);)
return val;
return val;
}
/****************************************************************************
......
......@@ -135,6 +135,7 @@ void push_word (u16 w);
void push_long (u32 w);
u16 pop_word (void);
u32 pop_long (void);
void cpuid (void);
#if defined(__HAVE_INLINE_ASSEMBLER__) && !defined(PRIM_OPS_NO_REDEFINE_ASM)
......
/****************************************************************************
*
* Inline helpers for x86emu
*
* Copyright (C) 2008 Bart Trojanowski, Symbio Technologies, LLC
*
* ========================================================================
*
* Permission to use, copy, modify, distribute, and sell this software and
* its documentation for any purpose is hereby granted without fee,
* provided that the above copyright notice appear in all copies and that
* both that copyright notice and this permission notice appear in
* supporting documentation, and that the name of the authors not be used
* in advertising or publicity pertaining to distribution of the software
* without specific, written prior permission. The authors makes no
* representations about the suitability of this software for any purpose.
* It is provided "as is" without express or implied warranty.
*
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*
* ========================================================================
*
* Language: GNU C
* Environment: GCC on i386 or x86-64
* Developer: Bart Trojanowski
*
* Description: This file defines a few x86 macros that can be used by the
* emulator to execute native instructions.
*
* For PIC vs non-PIC code refer to:
* http://sam.zoy.org/blog/2007-04-13-shlib-with-non-pic-code-have-inline-assembly-and-pic-mix-well
*
****************************************************************************/
#ifndef __X86EMU_PRIM_X86_GCC_H
#define __X86EMU_PRIM_X86_GCC_H
#include "types.h"
#if !defined(__GNUC__) || !(defined (__i386__) || defined(__i386) || defined(__AMD64__) || defined(__x86_64__) || defined(__amd64__))
#error This file is intended to be used by gcc on i386 or x86-64 system
#endif
#if defined(__PIC__) && defined(__i386__)
#define X86EMU_HAS_HW_CPUID 1
static inline void hw_cpuid (u32 *a, u32 *b, u32 *c, u32 *d)
{
__asm__ __volatile__ ("pushl %%ebx \n\t"
"cpuid \n\t"
"movl %%ebx, %1 \n\t"
"popl %%ebx \n\t"
: "=a" (*a), "=r" (*b),
"=c" (*c), "=d" (*d)
: "a" (*a), "c" (*c)
: "cc");
}
#else // ! (__PIC__ && __i386__)
#define x86EMU_HAS_HW_CPUID 1
static inline void hw_cpuid (u32 *a, u32 *b, u32 *c, u32 *d)
{
__asm__ __volatile__ ("cpuid"
: "=a" (*a), "=b" (*b),
"=c" (*c), "=d" (*d)
: "a" (*a), "c" (*c)
: "cc");
}
#endif // __PIC__ && __i386__
#endif // __X86EMU_PRIM_X86_GCC_H
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