Commit ef3b3601 authored by Geert Stappers's avatar Geert Stappers

Import Upstream version 2.8.0.dfsg

parent 58414e1e
# Configuration file for git-buildpackage and friends
[DEFAULT]
# the default build command:
#builder = debuild -i\.git/ -I.git
# the default clean command:
#cleaner = debuild clean
# the default branch for upstream sources:
upstream-branch = dfsg-orig
# the default branch for the debian patch:
debian-branch = dfsg-debian
# the default tag formats used:
#upstream-tag = upstream/%(version)s
#debian-tag = debian/%(version)s
# use pristine-tar:
pristine-tar = True
# Options only affecting git-buildpackage
[git-buildpackage]
#upstream-branch = dfsgclean
# uncomment this to automatically GPG sign tags
#sign-tags = True
# keyid to GPG sign tags with
#keyid = 0xdeadbeef
# push to a remote repository after a successful tag:
#posttag = git-push git.example.com
# use this for more svn-buildpackage like behaviour:
export-dir = ../build-area/
#tarball-dir = ../tarballs/
# Options only affecting git-import-orig
[git-import-orig]
#upstream-branch = newupstream
#debian-branch = dfsgclean
#filter = .svn
# Options only affecting git-import-dsc
[git-import-dsc]
#upstream-branch = svn-upstream
#filter = [ 'CVS', '.cvsignore' ]
# Options only affecting git-dch
[git-dch]
#git-log = --no-merges
#snapshot-number = snapshot + 1
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ASxxxx Cross Assemblers, Version 1.7, November 1995
Submitted by Alan R. Baldwin,
Kent State University, Kent, Ohio
Operating System: TSX+, RT-11, MS/DOS, PDOS
or other supporting K&R C.
Source Langauge: C
Abstract:
The ASxxxx assemblers are a series of microprocessor assem-
blers written in the C programming language. This collection
contains cross assemblers for the 6800(6802/6808), 6801(hd6303),
6804, 6805, 68HC08, 6809, 6811, 68HC16, 8085(8080),
z80(hd64180), H8/3xx, and 6500 series microprocessors. Each as-
sembler has a device specific section which includes: (1)
device description, byte order, and file extension information,
(2) a table of assembler general directives, special directives,
assembler mnemonics and associated operation codes, (3) machine
specific code for processing the device mnemonics, addressing
modes, and special directives.
The assemblers have a common device independent section which
handles the details of file input/output, symbol table genera-
tion, program/data areas, expression analysis, and assembler
directive processing.
The assemblers provide the following features: (1) alpha-
betized, formatted symbol table listings, (2) relocatable object
modules, (3) global symbols for linking object modules, (4) con-
ditional assembly directives, (5) reusable local symbols, and
(6) include-file processing.
The companion program ASLINK is a relocating linker perform-
ing the following functions: (1) bind multiple object modules
into a single memory image, (2) resolve inter-module symbol
references, (3) resolve undefined symbols from specified
librarys of object modules, (4) process absolute, relative, con-
catenated, and overlay attributes in data and program sections,
(5) perform byte and word program-counter relative (pc or pcr)
addressing calculations, (6) define absolute symbol values at
link time, (7) define absolute area base address values at link
time, (8) produce Intel Hex or Motorola S19 output file, (9)
produce a map of the linked memory image, and (10) update the
ASxxxx assembler listing files with the absolute linked ad-
dresses and data.
The assemblers and linker have been tested using DECUS C
under TSX+ and RT-11, PDOS C V5.4b, and Symantec C/C++ V6.1/V7.0
under DOS/Windows 3.x. Complete source code and documentation
for the assemblers and linker is included with the distribution.
Additionally, test code for each assembler and several micropro-
cessor monitors ( ASSIST05 for the 6805, MONDEB and ASSIST09 for
the 6809, and BUFFALO 2.5 for the 6811) are included as working
examples of use of these assemblers.
\ No newline at end of file
APPENDIX K
AS8051 ASSEMBLER
K.1 8051 REGISTER SET
The following is a list of the 8051 registers used by AS8051:
a,b - 8-bit accumulators
r0,r1,r2,r3 - 8-bit registers
r4,r5,r6,r7
dptr - data pointer
sp - stack pointer
pc - program counter
psw - status word
c - carry (bit in status word)
K.2 8051 INSTRUCTION SET
The following tables list all 8051 mnemonics recognized
by the AS8051 assembler. The following list specifies the
format for each addressing mode supported by AS8051:
#data immediate data
byte or word data
r,r1,r2 register r0,r1,r2,r3,r4,r5,r6, or r7
@r indirect on register r0 or r1
@dptr indirect on data pointer
@a+dptr indirect on accumulator plus data pointer
@a+pc indirect on accumulator plus program counter
addr direct memory address
bitaddr bit address
label call or jump label
The terms data, addr, bitaddr, and label may all be expressions.
Note that not all addressing modes are valid with every in-
struction. Refer to the 8051 technical data for valid
modes.
K.2.1 Inherent Instructions
nop
K.2.6 Move Instructions
mov a,#data mov a,addr
mov a,r mov a,@r
mov r,#data mov r,addr
mov r,a
mov addr,a mov addr,#data
mov addr,r mov addr,@r
mov addr1,addr2 mov bitaddr,c
mov @r,#data mov @r,addr
mov @r,a
mov c,bitaddr
mov dptr,#data
movc a,@a+dptr movc a,@a+pc
movx a,@dptr movx a,@r
movx @dptr,a movx @r,a
K.2.8 Single Operand Instructions
clr a clr c
clr bitaddr
cpl a cpl c
cpl bitaddr
setb c setb bitaddr
da a
rr a rrc a
rl a rlc a
swap a
dec a dec r
dec @r
inc a inc r
inc dptr inc @r
div ab mul ab
pop addr push addr
K.2.8 Two Operand Instructions
add a,#data add a,addr
add a,r add a,@r
addc a,#data addc a,addr
addc a,r addc a,@r
subb a,#data subb a,addr
subb a,r subb a,@r
orl a,#data orl a,addr
orl a,r orl a,@r
orl addr,a orl addr,#data
orl c,bitaddr orl c,/bitaddr
anl a,#data anl a,addr
anl a,r anl a,@r
anl addr,a anl addr,#data
anl c,bitaddr anl c,/bitaddr
xrl a,#data xrl a,addr
xrl a,r xrl a,@r
xrl addr,a xrl addr,#data
xrl c,bitaddr xrl c,/bitaddr
xch a,addr xch a,r
xch a,@r xchd a,@r
K.2.3 Call and Return Instructions
acall label lcall label
ret reti
K.2.4 Jump Instructions
ajmp label
cjne a,#data,label cjne a,addr,label
cjne r,#data,label cjne @r,#data,label
djnz r,label djnz addr,label
jbc bitadr,label
jb bitadr,label jnb bitadr,label
jc label jnc label
jz label jnz label
jmp @a+dptr
ljmp label sjmp label
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2.5.1 Object Module Format
The first line of an object module contains the [XDQ][HL]
format specifier (i.e. XH indicates a hexidecimal file with
most significant byte first) for the following designators.
2.5.2 Header Line
H aa areas gg global symbols
The header line specifies the number of areas(aa) and the
number of global symbols(gg) defined or referenced in this ob-
ject module segment.
2.5.3 Module Line
M name
The module line specifies the module name from which this
header segment was assembled. The module line will not appear
if the .module directive was not used in the source program.
2.5.4 Symbol Line
S string Defnnnn
or
S string Refnnnn
The symbol line defines (Def) or references (Ref) the symbol
'string' with the value nnnn. The defined value is relative to
the current area base address. References to constants and
external global symbols will always appear before the first area
definition. References to external symbols will have a value of
zero.
2.5.5 Area Line
A label size ss flags ff
The area line defines the area label, the size (ss) of the
area in bytes, and the area flags (ff). The area flags specify
the ABS, REL, CON, OVR, and PAG parameters:
OVR/CON (0x04/0x00 i.e. bit position 2)
ABS/REL (0x08/0x00 i.e. bit position 3)
PAG (0x10 i.e. bit position 4)
2.5.6 T Line
T xx xx nn nn nn nn nn ...
The T line contains the assembled code output by the assem-
bler with xx xx being the offset address from the current area
base address and nn being the assembled instructions and data in
byte format.
2.5.7 R Line
R 0 0 nn nn n1 [n1x] n2 xx xx ...
The R line provides the relocation information to the linker.
The nn nn value is the current area index, i.e. which area the
current values were assembled. Relocation information is en-
coded in groups of 4 (possibly 5) bytes:
1. n1 (and optionally n1x) is the relocation mode and object
format:
1. bit 0 word(0x00)/byte(0x01)
2. bit 1 relocatable area(0x00)/symbol(0x02)
3. bit 2 normal(0x00)/PC relative(0x04) relocation
4. bit 3 1-byte(0x00)/2-byte(0x08) object format for
byte data
5. bit 4 signed(0x00)/unsigned(0x10) byte data
6. bit 5 normal(0x00)/page '0'(0x20) reference
7. bit 6 normal(0x00)/page 'nnn'(0x40) reference
8. bit 7 LSB byte(0x00)/MSB byte(0x80) with 2-byte
mode
9. bit 8 1 or 2 (0x00)/3-byte (0x100) object format
for byte data.
10. bit 9 LSB or MSB (middle byte) (0x00) or byte 3
(real MSB) (0x200) for 3-byte mode.
If the upper four bits of n1 are set (i.e.
(n1 & 0xf0) == 0xf0), it is taken as an escape character,
and the relocation mode will consist of the lower four bits
of n1 left shifted 8 bits or'ed with the value of n1x. If
the upper four bits of n1 are not all set, then it is not an
escape character, and the n1x byte is not present.
This escape mechanism allows a 12-bit relocation mode value.
Note that in byte mode, when 3-byte mode is used (bits 0
and 8 are both set), the MSB bit (bit 7) really refers to
the 16 bit MSB (the middle byte of the 24-bit value) while
the "byte 3" bit (bit 9) refers to the 24-bit MSB.
2. n2 is a byte index into the corresponding (i.e. pre-
ceeding) T line data (i.e. a pointer to the data to be
updated by the relocation). The T line data may be
1-byte or 2-byte byte data format or 2-byte word
format.
3. xx xx is the area/symbol index for the area/symbol be-
ing referenced. the corresponding area/symbol is found
in the header area/symbol lists.
The groups of 4 bytes are repeated for each item requiring relo-
cation in the preceeding T line.
2.5.8 P Line
P 0 0 nn nn n1 n2 xx xx
The P line provides the paging information to the linker as
specified by a .setdp directive. The format of the relocation
information is identical to that of the R line. The correspond-
ing T line has the following information:
T xx xx aa aa bb bb
Where aa aa is the area reference number which specifies the
selected page area and bb bb is the base address of the page.
bb bb will require relocation processing if the 'n1 n2 xx xx' is
specified in the P line. The linker will verify that the base
address is on a 256 byte boundary and that the page length of an
area defined with the PAG type is not larger than 256 bytes.
The linker defaults any direct page references to the first
area defined in the input REL file. All ASxxxx assemblers will
specify the _CODE area first, making this the default page area.
CC=gcc
LEX=flex
YACC=bison
INCROOT=.
CFLAGS=-ggdb -O2 -I $(INCROOT)
TARGETS=$(SDCCDIR)/bin/as_hc08
ALLOBJECTS= asmain.o aslex.o assym.o assubr.o asnoice.o \
asexpr.o asdata.o aslist.o asout.o asstore.o \
h08ext.o h08pst.o h08mch.o h08adr.o strcmpi.o
all:: $(TARGETS)
clean::
rm -f $(TARGETS) $(ALLOBJECTS)
asmain.o : asmain.c asm.h
$(CC) $(CFLAGS) $(LDFLAGS) -c -o asmain.o asmain.c
aslex.o : aslex.c asm.h
$(CC) $(CFLAGS) $(LDFLAGS) -c -o aslex.o aslex.c
assym.o : assym.c asm.h
$(CC) $(CFLAGS) $(LDFLAGS) -c -o assym.o assym.c
assubr.o : assubr.c asm.h
$(CC) $(CFLAGS) $(LDFLAGS) -c -o assubr.o assubr.c
asexpr.o : asexpr.c asm.h
$(CC) $(CFLAGS) $(LDFLAGS) -c -o asexpr.o asexpr.c
asdata.o : asdata.c asm.h
$(CC) $(CFLAGS) $(LDFLAGS) -c -o asdata.o asdata.c
aslist.o : aslist.c asm.h
$(CC) $(CFLAGS) $(LDFLAGS) -c -o aslist.o aslist.c
asout.o : asout.c asm.h
$(CC) $(CFLAGS) $(LDFLAGS) -c -o asout.o asout.c
asnoice.o : asnoice.c asm.h
$(CC) $(CFLAGS) $(LDFLAGS) -c -o asnoice.o asnoice.c
asstore.o : asstore.c asm.h
$(CC) $(CFLAGS) $(LDFLAGS) -c -o asstore.o asstore.c
h08ext.o : h08ext.c asm.h m6808.h
$(CC) $(CFLAGS) $(LDFLAGS) -c -o h08ext.o h08ext.c
h08pst.o : h08pst.c asm.h m6808.h
$(CC) $(CFLAGS) $(LDFLAGS) -c -o h08pst.o h08pst.c
h08mch.o : h08mch.c asm.h m6808.h
$(CC) $(CFLAGS) $(LDFLAGS) -c -o h08mch.o h08mch.c
h08adr.o : h08adr.c asm.h m6808.h
$(CC) $(CFLAGS) $(LDFLAGS) -c -o h08adr.o h08adr.c
strcmpi.o : strcmpi.c strcmpi.h
$(CC) $(CFLAGS) $(LDFLAGS) -c -o strcmpi.o strcmpi.c
$(TARGETS): $(ALLOBJECTS)
$(CC) $(CFLAGS) $(LDFLAGS) -o $@ $(ALLOBJECTS)
# Makefile for Borlad C++
PRJDIR = ../..