Commit 0f9c18bf authored by Ben Hutchings's avatar Ben Hutchings

drm, agp: Update to 3.4.39

svn path=/dists/sid/linux/; revision=19974
parent 095165e9
......@@ -58,12 +58,13 @@ linux (3.2.43-1) UNRELEASED; urgency=low
* Input: MT: add tracking and frame synchronisation to core
* Input: add support for Cypress PS/2 Trackpads (Closes: #703607),
thanks to Apollon Oikonomopoulos
* drm, agp: Update to 3.4.38:
* drm, agp: Update to 3.4.39:
- drm/i915: restrict kernel address leak in debugfs
- KMS: fix EDID detailed timing vsync parsing
- KMS: fix EDID detailed timing frame rate
- drm/radeon: add support for Richland APUs
- drm/radeon/benchmark: make sure bo blit copy exists before using it
- drm/i915: Don't clobber crtc->fb when queue_flip fails
* [rt] Update to 3.2.42-rt62
* debugfs: Document change of default mode
......
......@@ -47709,7 +47709,7 @@ index fee0ad0..342ffb7 100644
drm_encoder_helper_add(&crt->base.base, &intel_crt_helper_funcs);
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 17961df..7ccf896 100644
index 17961df..84867a8 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -75,7 +75,7 @@ struct intel_limit {
......@@ -49093,46 +49093,7 @@ index 17961df..7ccf896 100644
err:
return ret;
}
@@ -7280,8 +7567,8 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
{
struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
- struct drm_framebuffer *old_fb = crtc->fb;
- struct drm_i915_gem_object *obj = to_intel_framebuffer(fb)->obj;
+ struct intel_framebuffer *intel_fb;
+ struct drm_i915_gem_object *obj;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct intel_unpin_work *work;
unsigned long flags;
@@ -7293,7 +7580,8 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
work->event = event;
work->dev = crtc->dev;
- work->old_fb_obj = to_intel_framebuffer(old_fb)->obj;
+ intel_fb = to_intel_framebuffer(crtc->fb);
+ work->old_fb_obj = intel_fb->obj;
INIT_WORK(&work->work, intel_unpin_work_fn);
ret = drm_vblank_get(dev, intel_crtc->pipe);
@@ -7313,6 +7601,9 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
intel_crtc->unpin_work = work;
spin_unlock_irqrestore(&dev->event_lock, flags);
+ intel_fb = to_intel_framebuffer(fb);
+ obj = intel_fb->obj;
+
mutex_lock(&dev->struct_mutex);
/* Reference the objects for the scheduled work. */
@@ -7343,7 +7634,6 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
cleanup_pending:
atomic_sub(1 << intel_crtc->plane, &work->old_fb_obj->pending_flip);
- crtc->fb = old_fb;
drm_gem_object_unreference(&work->old_fb_obj->base);
drm_gem_object_unreference(&obj->base);
mutex_unlock(&dev->struct_mutex);
@@ -7556,10 +7846,9 @@ static void intel_setup_outputs(struct drm_device *dev)
@@ -7556,10 +7843,9 @@ static void intel_setup_outputs(struct drm_device *dev)
struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_encoder *encoder;
bool dpd_is_edp = false;
......@@ -49145,7 +49106,7 @@ index 17961df..7ccf896 100644
if (!has_lvds && !HAS_PCH_SPLIT(dev)) {
/* disable the panel fitter on everything but LVDS */
I915_WRITE(PFIT_CONTROL, 0);
@@ -7688,7 +7977,7 @@ static const struct drm_framebuffer_funcs intel_fb_funcs = {
@@ -7688,7 +7974,7 @@ static const struct drm_framebuffer_funcs intel_fb_funcs = {
int intel_framebuffer_init(struct drm_device *dev,
struct intel_framebuffer *intel_fb,
......@@ -49154,7 +49115,7 @@ index 17961df..7ccf896 100644
struct drm_i915_gem_object *obj)
{
int ret;
@@ -7696,21 +7985,27 @@ int intel_framebuffer_init(struct drm_device *dev,
@@ -7696,21 +7982,27 @@ int intel_framebuffer_init(struct drm_device *dev,
if (obj->tiling_mode == I915_TILING_Y)
return -EINVAL;
......@@ -49192,7 +49153,7 @@ index 17961df..7ccf896 100644
return -EINVAL;
}
@@ -7728,11 +8023,12 @@ int intel_framebuffer_init(struct drm_device *dev,
@@ -7728,11 +8020,12 @@ int intel_framebuffer_init(struct drm_device *dev,
static struct drm_framebuffer *
intel_user_framebuffer_create(struct drm_device *dev,
struct drm_file *filp,
......@@ -49207,7 +49168,7 @@ index 17961df..7ccf896 100644
if (&obj->base == NULL)
return ERR_PTR(-ENOENT);
@@ -8001,7 +8297,7 @@ void intel_init_emon(struct drm_device *dev)
@@ -8001,7 +8294,7 @@ void intel_init_emon(struct drm_device *dev)
dev_priv->corr = (lcfuse & LCFUSE_HIV_MASK);
}
......@@ -49216,7 +49177,7 @@ index 17961df..7ccf896 100644
{
/*
* Respect the kernel parameter if it is set
@@ -8019,11 +8315,11 @@ static bool intel_enable_rc6(struct drm_device *dev)
@@ -8019,11 +8312,11 @@ static bool intel_enable_rc6(struct drm_device *dev)
* Disable rc6 on Sandybridge
*/
if (INTEL_INFO(dev)->gen == 6) {
......@@ -49232,7 +49193,7 @@ index 17961df..7ccf896 100644
}
void gen6_enable_rps(struct drm_i915_private *dev_priv)
@@ -8031,7 +8327,9 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
@@ -8031,7 +8324,9 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
u32 pcu_mbox, rc6_mask = 0;
......@@ -49242,7 +49203,7 @@ index 17961df..7ccf896 100644
int i;
/* Here begins a magic sequence of register writes to enable
@@ -8042,6 +8340,13 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
@@ -8042,6 +8337,13 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
*/
I915_WRITE(GEN6_RC_STATE, 0);
mutex_lock(&dev_priv->dev->struct_mutex);
......@@ -49256,7 +49217,7 @@ index 17961df..7ccf896 100644
gen6_gt_force_wake_get(dev_priv);
/* disable the counters and set deterministic thresholds */
@@ -8062,9 +8367,20 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
@@ -8062,9 +8364,20 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
I915_WRITE(GEN6_RC6p_THRESHOLD, 150000);
I915_WRITE(GEN6_RC6pp_THRESHOLD, 64000); /* unused */
......@@ -49280,7 +49241,7 @@ index 17961df..7ccf896 100644
I915_WRITE(GEN6_RC_CONTROL,
rc6_mask |
@@ -8292,6 +8608,10 @@ static void gen6_init_clock_gating(struct drm_device *dev)
@@ -8292,6 +8605,10 @@ static void gen6_init_clock_gating(struct drm_device *dev)
I915_WRITE(WM2_LP_ILK, 0);
I915_WRITE(WM1_LP_ILK, 0);
......@@ -49291,7 +49252,7 @@ index 17961df..7ccf896 100644
/* According to the BSpec vol1g, bit 12 (RCPBUNIT) clock
* gating disable must be set. Failure to set it results in
* flickering pixels due to Z write ordering failures after
@@ -8370,6 +8690,10 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
@@ -8370,6 +8687,10 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
I915_WRITE(ILK_DSPCLK_GATE, IVB_VRHUNIT_CLK_GATE);
......@@ -49302,7 +49263,7 @@ index 17961df..7ccf896 100644
/* Apply the WaDisableRHWOOptimizationForRenderHang workaround. */
I915_WRITE(GEN7_COMMON_SLICE_CHICKEN1,
GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC);
@@ -8680,9 +9004,15 @@ static void intel_init_display(struct drm_device *dev)
@@ -8680,9 +9001,15 @@ static void intel_init_display(struct drm_device *dev)
if (IS_IVYBRIDGE(dev)) {
u32 ecobus;
......@@ -49319,7 +49280,7 @@ index 17961df..7ccf896 100644
__gen6_gt_force_wake_mt_put(dev_priv);
mutex_unlock(&dev->struct_mutex);
@@ -8714,6 +9044,7 @@ static void intel_init_display(struct drm_device *dev)
@@ -8714,6 +9041,7 @@ static void intel_init_display(struct drm_device *dev)
} else if (IS_GEN6(dev)) {
if (SNB_READ_WM0_LATENCY()) {
dev_priv->display.update_wm = sandybridge_update_wm;
......@@ -49327,7 +49288,7 @@ index 17961df..7ccf896 100644
} else {
DRM_DEBUG_KMS("Failed to read display plane latency. "
"Disable CxSR\n");
@@ -8727,6 +9058,7 @@ static void intel_init_display(struct drm_device *dev)
@@ -8727,6 +9055,7 @@ static void intel_init_display(struct drm_device *dev)
dev_priv->display.fdi_link_train = ivb_manual_fdi_link_train;
if (SNB_READ_WM0_LATENCY()) {
dev_priv->display.update_wm = sandybridge_update_wm;
......@@ -49335,7 +49296,7 @@ index 17961df..7ccf896 100644
} else {
DRM_DEBUG_KMS("Failed to read display plane latency. "
"Disable CxSR\n");
@@ -8839,8 +9171,6 @@ struct intel_quirk {
@@ -8839,8 +9168,6 @@ struct intel_quirk {
};
struct intel_quirk intel_quirks[] = {
......@@ -49344,7 +49305,7 @@ index 17961df..7ccf896 100644
/* HP Mini needs pipe A force quirk (LP: #322104) */
{ 0x27ae, 0x103c, 0x361a, quirk_pipea_force },
@@ -8907,33 +9237,19 @@ static void i915_disable_vga(struct drm_device *dev)
@@ -8907,33 +9234,19 @@ static void i915_disable_vga(struct drm_device *dev)
POSTING_READ(vga_reg);
}
......@@ -49382,7 +49343,7 @@ index 17961df..7ccf896 100644
dev->mode_config.funcs = (void *)&intel_mode_funcs;
intel_init_quirks(dev);
@@ -8957,6 +9273,9 @@ void intel_modeset_init(struct drm_device *dev)
@@ -8957,6 +9270,9 @@ void intel_modeset_init(struct drm_device *dev)
for (i = 0; i < dev_priv->num_pipe; i++) {
intel_crtc_init(dev, i);
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