ethernet link types / speed are detected.

  * Removed patches applied upstream:
    - Avoid-crash-in-scan_dmi_sysfs-when-running-as-non-ro.patch
    - alpha.patch
    - fix-manpage.patch
    - fix-width-handling.patch
  * Add openstack-pkg-tools build-depends to manage upstream tarballs.
  * Removed quilt from build depends, switch to format 3.0 (quilt).
  * Ran wrap-and-sort -bast.
  * Fixed debian/rules to stop using lshw-<version>/src folder, but just src.

Commit f95aa917 applied the patch from #695, adding the
scan_devtree_memory_ibm() function, but it called the function in the
wrong place. The function finds memory-controller@* nodes on older IBM
POWER systems, not newer OPAL firmware based ones.

This patch has the side effect of reordering CPU nodes before memory
nodes on non-IBM device-tree-based hardware (like Calxeda Highbank and
other unusual stuff). That is in line with other platforms.

Previously, when the CPU information was coming from /proc/cpuinfo, this
logo hint was being set.

Recent versions of the PCIID database added programming interface names
for IDE controllers, like this:

	01  IDE interface
		00  ISA Compatibility mode-only controller
		05  PCI native mode-only controller
		0a  ISA Compatibility mode controller, supports both channels switched to PCI native mode
		0f  PCI native mode controller, supports both channels switched to ISA compatibility mode
		80  ISA Compatibility mode-only controller, supports bus mastering
		85  PCI native mode-only controller, supports bus mastering
		8a  ISA Compatibility mode controller, supports both channels switched to PCI native mode, supports bus mastering
		8f  PCI native mode controller, supports both channels switched to ISA compatibility mode, supports bus mastering

resulting in an awkwardly named capability for the IDE controller:

    <capabilities>
     <capability id="ide" />
     <capability id="pci_native_mode_controller__supports_both_channels_switched_to_isa_compatibility_mode__supports_bus_mastering" />
     <capability id="bus_master" >bus mastering</capability>
    </capabilities>

This patch adds a special case for IDE controllers to avoid using the
programming interface name as a capability. Instead, separate
capabilities are added for the possible combinations:

    <capabilities>
     <capability id="ide" />
     <capability id="isa_compat_mode" >ISA compatibility mode</capability>
     <capability id="pci_native_mode" >PCI native mode</capability>
     <capability id="bus_master" >bus mastering</capability>
    </capabilities>

Properly handle scsi device type 0x14 (== 20) to add ZBC and ZAC host
managed zoned block devices to the "disk" class. While at it, also add
in scsi_type() the missing type name string for the device
type 0xe (== 14).

cf. https://github.com/lyonel/lshw/pull/36

The data files currently ocuppy 6.7MB. Compressing them with gzip reduce
that space to 1.9MB, which is useful for space-constrained environments,
like embedded systems. This is achieved by the following changes:

- Add the ZLIB make variable to enable compilation with zlib support.
- Modify the loadfile function (in src/core/osutils.cc) to use gzopen,
  gzread, etc. to read data files.
- Try to open 'file.foo.gz' first, then 'file.foo'. This works because
  gzopen(3) and gzread(3) treat files not in the gzip format as ordinary
  ones and open/read them as ordinary open(2) and read(2) would do.

Signed-off-by: Carlos Santos <casantos@datacom.ind.br>

Device tree provides 'vendor' property for cpu nodes. Use that to
populate cpu vendor field

Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>

On IBM Power System device tree parsing code detects CPU state
and sets enable flag properly. Hence do not call enable() from
cpuinfo code.

Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>

In some Power system (like P9 system), spd data is available under
ms-dimm node in device tree. Hence call add_memory_bank_spd() from
ms-dimm section as well.

Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>

Commit f95aa917 removed vendor property for Power System PowerNV platform.
We have "/vendor" property in device tree which gives Vendor name.

Hence revert changes. Note that this only reverts "vendor" property for
particular platform and no side effect on other platform.

Fixes: f95aa917

 (merge patches from beaker-fork)
CC: Lyonel Vincent <lyonel@ezix.org>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>

Check status property for L1 cache before enabling cache node.
Also check status before enabling L2/L3 icache.

Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>

The code forgot to rebase the num to 0 before indexing the string array.
It also provides 5 strings, but was only allowing 4 to be accessed.

When Intel SGX is enabled in kernel, /dev/sgx is created and is
picked up by "/dev/sg*" glob matching.

Signed-off-by: Wenkai Du <wenkai.du@intel.com>