New upstream version 0.0.0.git.20191209 (f3bea9b0) · Commits · Debian Med / simde

simde/simde-common.h

+18 −1

Original line number	Diff line number	Diff line
		@@ -215,7 +215,7 @@ HEDLEY_STATIC_ASSERT(sizeof(simde_float64) == 8, "Unable to find 64-bit floating
		#endif

		#if HEDLEY_GCC_HAS_BUILTIN(__builtin_convertvector,9,0,0)
		# define SIMDE__CONVERT_VECTOR(to, from) ((to) = __builtin_convertvector((from), typeof(to)))
		# define SIMDE__CONVERT_VECTOR(to, from) ((to) = __builtin_convertvector((from), __typeof__(to)))
		#endif

		#if HEDLEY_HAS_WARNING("-Wbad-function-cast")
		@@ -305,4 +305,21 @@ HEDLEY_STATIC_ASSERT(sizeof(simde_float64) == 8, "Unable to find 64-bit floating
		# endif
		#endif

		#if !defined(__cplusplus)
		#define SIMDE_F64_ALL_SET (((union { uint64_t u64; simde_float64 f64; }) { .u64 = ~UINT64_C(0x0) }).f64)
		#define SIMDE_F64_ALL_UNSET (((union { uint64_t u64; simde_float64 f64; }) { .u64 = UINT64_C(0x0) }).f64)
		#define SIMDE_F32_ALL_SET (((union { uint32_t u32; simde_float32 f32; }) { .u32 = ~UINT32_C(0x0) }).f32)
		#define SIMDE_F32_ALL_UNSET (((union { uint32_t u32; simde_float32 f32; }) { .u32 = UINT32_C(0x0) }).f32)
		#else
		static const union { uint64_t u64; simde_float64 f64; } simde_f64_all_set = { .u64 = ~UINT64_C(0) };
		static const union { uint64_t u64; simde_float64 f64; } simde_f64_all_unset = { .u64 = UINT64_C(0) };
		static const union { uint64_t u32; simde_float64 f32; } simde_f32_all_set = { .u32 = ~UINT32_C(0) };
		static const union { uint64_t u32; simde_float64 f32; } simde_f32_all_unset = { .u32 = UINT32_C(0) };

		# define SIMDE_F64_ALL_SET (simde_f64_all_set.f64)
		# define SIMDE_F64_ALL_UNSET (simde_f64_all_unset.f64)
		# define SIMDE_F32_ALL_SET (simde_f32_all_set.f32)
		# define SIMDE_F32_ALL_UNSET (simde_f32_all_unset.f32)
		#endif

		#endif /* !defined(SIMDE_COMMON_H) */

simde/x86/avx.h

+244 −249

File changed.

Preview size limit exceeded, changes collapsed.

simde/x86/avx2.h

+14 −14

Original line number	Diff line number	Diff line
		@@ -184,7 +184,7 @@ simde_mm256_broadcastsi128_si256 (simde__m128i a) {
		simde__m256i r;

		#if defined(SIMDE_AVX2_NATIVE)
		return SIMDE__M256I_C(_mm256_broadcastsi128_si256(a.n));
		return SIMDE__M256I_FROM_NATIVE(_mm256_broadcastsi128_si256(a.n));
		#elif defined(SIMDE_SSE2_NATIVE)
		r.m128i[0].n = a.n;
		r.m128i[1].n = a.n;
		@@ -206,7 +206,7 @@ simde__m256i
		simde_mm256_cvtepi8_epi16 (simde__m128i a){
		simde__m256i r;
		#if defined(SIMDE_AVX2_NATIVE)
		r = SIMDE__M256I_C(_mm256_cvtepi8_epi16(a.n));
		r = SIMDE__M256I_FROM_NATIVE(_mm256_cvtepi8_epi16(a.n));
		#else
		SIMDE__VECTORIZE
		for (size_t i = 0 ; i < (sizeof(r.i16) / sizeof(r.i16[0])) ; i++) {
		@@ -224,7 +224,7 @@ simde__m256i
		simde_mm256_cvtepi8_epi32 (simde__m128i a){
		simde__m256i r;
		#if defined(SIMDE_AVX2_NATIVE)
		r = SIMDE__M256I_C(_mm256_cvtepi8_epi32(a.n));
		r = SIMDE__M256I_FROM_NATIVE(_mm256_cvtepi8_epi32(a.n));
		#else
		SIMDE__VECTORIZE
		for (size_t i = 0 ; i < (sizeof(r.i32) / sizeof(r.i32[0])) ; i++) {
		@@ -242,7 +242,7 @@ simde__m256i
		simde_mm256_cvtepi8_epi64 (simde__m128i a){
		simde__m256i r;
		#if defined(SIMDE_AVX2_NATIVE)
		r = SIMDE__M256I_C(_mm256_cvtepi8_epi64(a.n));
		r = SIMDE__M256I_FROM_NATIVE(_mm256_cvtepi8_epi64(a.n));
		#else
		SIMDE__VECTORIZE
		for (size_t i = 0 ; i < (sizeof(r.i64) / sizeof(r.i64[0])) ; i++) {
		@@ -260,7 +260,7 @@ simde__m256i
		simde_mm256_cvtepi16_epi32 (simde__m128i a){
		simde__m256i r;
		#if defined(SIMDE_AVX2_NATIVE)
		r = SIMDE__M256I_C(_mm256_cvtepi16_epi32(a.n));
		r = SIMDE__M256I_FROM_NATIVE(_mm256_cvtepi16_epi32(a.n));
		#else
		SIMDE__VECTORIZE
		for (size_t i = 0 ; i < (sizeof(r.i32) / sizeof(r.i32[0])) ; i++) {
		@@ -278,7 +278,7 @@ simde__m256i
		simde_mm256_cvtepi16_epi64 (simde__m128i a){
		simde__m256i r;
		#if defined(SIMDE_AVX2_NATIVE)
		r = SIMDE__M256I_C(_mm256_cvtepi16_epi64(a.n));
		r = SIMDE__M256I_FROM_NATIVE(_mm256_cvtepi16_epi64(a.n));
		#else
		SIMDE__VECTORIZE
		for (size_t i = 0 ; i < (sizeof(r.i64) / sizeof(r.i64[0])) ; i++) {
		@@ -296,7 +296,7 @@ simde__m256i
		simde_mm256_cvtepi32_epi64 (simde__m128i a){
		simde__m256i r;
		#if defined(SIMDE_AVX2_NATIVE)
		r = SIMDE__M256I_C(_mm256_cvtepi32_epi64(a.n));
		r = SIMDE__M256I_FROM_NATIVE(_mm256_cvtepi32_epi64(a.n));
		#else
		SIMDE__VECTORIZE
		for (size_t i = 0 ; i < (sizeof(r.i64) / sizeof(r.i64[0])) ; i++) {
		@@ -314,7 +314,7 @@ simde__m256i
		simde_mm256_cvtepu8_epi16 (simde__m128i a){
		simde__m256i r;
		#if defined(SIMDE_AVX2_NATIVE)
		r = SIMDE__M256I_C(_mm256_cvtepu8_epi16(a.n));
		r = SIMDE__M256I_FROM_NATIVE(_mm256_cvtepu8_epi16(a.n));
		#else
		SIMDE__VECTORIZE
		for (size_t i = 0 ; i < (sizeof(r.i16) / sizeof(r.i16[0])) ; i++) {
		@@ -332,7 +332,7 @@ simde__m256i
		simde_mm256_cvtepu8_epi32 (simde__m128i a){
		simde__m256i r;
		#if defined(SIMDE_AVX2_NATIVE)
		r = SIMDE__M256I_C(_mm256_cvtepu8_epi32(a.n));
		r = SIMDE__M256I_FROM_NATIVE(_mm256_cvtepu8_epi32(a.n));
		#else
		SIMDE__VECTORIZE
		for (size_t i = 0 ; i < (sizeof(r.i32) / sizeof(r.i32[0])) ; i++) {
		@@ -350,7 +350,7 @@ simde__m256i
		simde_mm256_cvtepu8_epi64 (simde__m128i a){
		simde__m256i r;
		#if defined(SIMDE_AVX2_NATIVE)
		r = SIMDE__M256I_C(_mm256_cvtepu8_epi64(a.n));
		r = SIMDE__M256I_FROM_NATIVE(_mm256_cvtepu8_epi64(a.n));
		#else
		SIMDE__VECTORIZE
		for (size_t i = 0 ; i < (sizeof(r.i64) / sizeof(r.i64[0])) ; i++) {
		@@ -368,7 +368,7 @@ simde__m256i
		simde_mm256_cvtepu16_epi32 (simde__m128i a){
		simde__m256i r;
		#if defined(SIMDE_AVX2_NATIVE)
		r = SIMDE__M256I_C(_mm256_cvtepu16_epi32(a.n));
		r = SIMDE__M256I_FROM_NATIVE(_mm256_cvtepu16_epi32(a.n));
		#else
		SIMDE__VECTORIZE
		for (size_t i = 0 ; i < (sizeof(r.i32) / sizeof(r.i32[0])) ; i++) {
		@@ -386,7 +386,7 @@ simde__m256i
		simde_mm256_cvtepu16_epi64 (simde__m128i a){
		simde__m256i r;
		#if defined(SIMDE_AVX2_NATIVE)
		r = SIMDE__M256I_C(_mm256_cvtepu16_epi64(a.n));
		r = SIMDE__M256I_FROM_NATIVE(_mm256_cvtepu16_epi64(a.n));
		#else
		SIMDE__VECTORIZE
		for (size_t i = 0 ; i < (sizeof(r.i64) / sizeof(r.i64[0])) ; i++) {
		@@ -404,7 +404,7 @@ simde__m256i
		simde_mm256_cvtepu32_epi64 (simde__m128i a){
		simde__m256i r;
		#if defined(SIMDE_AVX2_NATIVE)
		r = SIMDE__M256I_C(_mm256_cvtepu32_epi64(a.n));
		r = SIMDE__M256I_FROM_NATIVE(_mm256_cvtepu32_epi64(a.n));
		#else
		SIMDE__VECTORIZE
		for (size_t i = 0 ; i < (sizeof(r.i64) / sizeof(r.i64[0])) ; i++) {
		@@ -467,7 +467,7 @@ simde_mm256_srli_epi64 (simde__m256i a, const int imm8) {
		return r;
		}
		#if defined(SIMDE_AVX2_NATIVE)
		# define simde_mm256_srli_epi64(a, imm8) SIMDE__M256I_C(_mm256_srli_epi64(a.n, imm8))
		# define simde_mm256_srli_epi64(a, imm8) SIMDE__M256I_FROM_NATIVE(_mm256_srli_epi64(a.n, imm8))
		#endif
		#if defined(SIMDE_AVX2_ENABLE_NATIVE_ALIASES)
		# define _mm256_srli_epi64(a, imm8) simde_mm256_srli_epi64(SIMDE__M256I_FROM_NATIVE(a), imm8)

simde/x86/sse.h

+32 −71

Original line number	Diff line number	Diff line
		@@ -1340,8 +1340,10 @@ simde_mm_cvtt_ps2pi (simde__m128 a) {

		return r;
		}
		#define simde_mm_cvttps_pi32(a) simde_mm_cvtt_ps2pi(a)
		#if defined(SIMDE_SSE_ENABLE_NATIVE_ALIASES)
		# define _mm_cvtt_ps2pi(a) SIMDE__M64_TO_NATIVE(simde_mm_cvtt_ps2pi(SIMDE__M128_FROM_NATIVE(a)))
		# define _mm_cvttps_pi32(a) SIMDE__M64_TO_NATIVE(simde_mm_cvttps_pi32(SIMDE__M128_FROM_NATIVE(a)))
		#endif

		SIMDE__FUNCTION_ATTRIBUTES
		@@ -1353,37 +1355,9 @@ simde_mm_cvtt_ss2si (simde__m128 a) {
		return SIMDE_CONVERT_FTOI(int32_t, truncf(a.f32[0]));
		#endif
		}
		#define simde_mm_cvttss_si32(a) simde_mm_cvtt_ss2si(a)
		#if defined(SIMDE_SSE_ENABLE_NATIVE_ALIASES)
		# define _mm_cvtt_ss2si(a) simde_mm_cvtt_ss2si(SIMDE__M128_FROM_NATIVE(a))
		#endif

		SIMDE__FUNCTION_ATTRIBUTES
		simde__m64
		simde_mm_cvttps_pi32 (simde__m128 a) {
		simde__m64 r;

		#if defined(SIMDE_SSE_NATIVE)
		r.n = _mm_cvttps_pi32(a.n);
		#else
		r = simde_mm_cvtt_ps2pi(a);
		#endif

		return r;
		}
		#if defined(SIMDE_SSE_ENABLE_NATIVE_ALIASES)
		# define _mm_cvtt_pi32(a) SIMDE__M64_TO_NATIVE(simde_mm_cvtt_pi32(SIMDE__M128_FROM_NATIVE(a)))
		#endif

		SIMDE__FUNCTION_ATTRIBUTES
		int32_t
		simde_mm_cvttss_si32 (simde__m128 a) {
		#if defined(SIMDE_SSE_NATIVE)
		return _mm_cvttss_si32(a.n);
		#else
		return SIMDE_CONVERT_FTOI(int32_t, truncf(a.f32[0]));
		#endif
		}
		#if defined(SIMDE_SSE_ENABLE_NATIVE_ALIASES)
		# define _mm_cvttss_si32(a) simde_mm_cvttss_si32(SIMDE__M128_FROM_NATIVE(a))
		#endif

		@@ -1565,6 +1539,8 @@ simde_mm_load_ps1 (simde_float32 const* mem_addr) {

		#if defined(SIMDE_SSE_NATIVE)
		r.n = _mm_load_ps1(mem_addr);
		#elif defined(SIMDE_SSE_NEON)
		r.neon_f32 = vld1q_dup_f32(mem_addr);
		#else
		const simde_float32 v = *mem_addr;
		SIMDE__VECTORIZE
		@@ -1575,6 +1551,7 @@ simde_mm_load_ps1 (simde_float32 const* mem_addr) {

		return r;
		}
		#define simde_mm_load1_ps(mem_addr) simde_mm_load_ps1(mem_addr)
		#if defined(SIMDE_SSE_ENABLE_NATIVE_ALIASES)
		# define _mm_load_ps1(mem_addr) SIMDE__M128_TO_NATIVE(simde_mm_load_ps1(mem_addr))
		#endif
		@@ -1601,25 +1578,6 @@ simde_mm_load_ss (simde_float32 const* mem_addr) {
		# define _mm_load_ss(mem_addr) SIMDE__M128_TO_NATIVE(simde_mm_load_ss(mem_addr))
		#endif

		SIMDE__FUNCTION_ATTRIBUTES
		simde__m128
		simde_mm_load1_ps (simde_float32 const* mem_addr) {
		simde__m128 r;

		#if defined(SIMDE_SSE_NATIVE)
		r.n = _mm_load1_ps(mem_addr);
		#elif defined(SIMDE_SSE_NEON)
		r.neon_f32 = vld1q_dup_f32(mem_addr);
		#else
		r = simde_mm_load_ps1(mem_addr);
		#endif

		return r;
		}
		#if defined(SIMDE_SSE_ENABLE_NATIVE_ALIASES)
		# define _mm_load1_ps(mem_addr) SIMDE__M128_TO_NATIVE(simde_mm_load1_ps(mem_addr))
		#endif

		SIMDE__FUNCTION_ATTRIBUTES
		simde__m128
		simde_mm_loadh_pi (simde__m128 a, simde__m64 const* mem_addr) {
		@@ -2393,10 +2351,25 @@ simde_mm_sfence (void) {
		# define _MM_SHUFFLE(z, y, x, w) SIMDE_MM_SHUFFLE(z, y, x, w)
		#endif

		#if defined(SIMDE_SSE_NATIVE) && !defined(__PGI)
		# define simde_mm_shuffle_pi16(a, imm8) SIMDE__M64_FROM_NATIVE(_mm_shuffle_pi16(a.n, imm8))
		#elif defined(SIMDE__SHUFFLE_VECTOR)
		# define simde_mm_shuffle_pi16(a, imm8) (__extension__ ({ \
		const simde__m64 simde__tmp_a_ = a; \
		(simde__m64) { .i16 = \
		SIMDE__SHUFFLE_VECTOR(16, 8, \
		(simde__tmp_a_).i16, \
		(simde__tmp_a_).i16, \
		(((imm8) ) & 3), \
		(((imm8) >> 2) & 3), \
		(((imm8) >> 4) & 3), \
		(((imm8) >> 6) & 3)) }; }))
		#else
		SIMDE__FUNCTION_ATTRIBUTES
		simde__m64
		simde_mm_shuffle_pi16 (simde__m64 a, const int imm8) {
		simde__m64 r;

		for (size_t i = 0 ; i < sizeof(r.i16) / sizeof(r.i16[0]) ; i++) {
		r.i16[i] = a.i16[(imm8 >> (i * 2)) & 3];
		}
		@@ -2408,19 +2381,6 @@ HEDLEY_DIAGNOSTIC_PUSH
		return r;
		HEDLEY_DIAGNOSTIC_POP
		}
		#if defined(SIMDE_SSE_NATIVE) && !defined(__PGI)
		# define simde_mm_shuffle_pi16(a, imm8) SIMDE__M64_FROM_NATIVE(_mm_shuffle_pi16(a.n, imm8))
		#elif defined(SIMDE__SHUFFLE_VECTOR)
		# define simde_mm_shuffle_pi16(a, imm8) (__extension__ ({ \
		const simde__m64 simde__tmp_a_ = a; \
		(simde__m64) { .i16 = \
		SIMDE__SHUFFLE_VECTOR(16, 8, \
		(simde__tmp_a_).i16, \
		(simde__tmp_a_).i16, \
		(((imm8) ) & 3), \
		(((imm8) >> 2) & 3), \
		(((imm8) >> 4) & 3), \
		(((imm8) >> 6) & 3)) }; }))
		#endif
		#if defined(SIMDE_SSE_NATIVE) && !defined(__PGI)
		# define simde_m_pshufw(a, imm8) SIMDE__M64_FROM_NATIVE(_m_pshufw(a.n, imm8))
		@@ -2432,16 +2392,6 @@ HEDLEY_DIAGNOSTIC_POP
		# define _m_pshufw(a, imm8) SIMDE__M64_TO_NATIVE(simde_mm_shuffle_pi16(SIMDE__M64_FROM_NATIVE(a), imm8))
		#endif

		SIMDE__FUNCTION_ATTRIBUTES
		simde__m128
		simde_mm_shuffle_ps (simde__m128 a, simde__m128 b, const int imm8) {
		simde__m128 r;
		r.f32[0] = a.f32[(imm8 >> 0) & 3];
		r.f32[1] = a.f32[(imm8 >> 2) & 3];
		r.f32[2] = b.f32[(imm8 >> 4) & 3];
		r.f32[3] = b.f32[(imm8 >> 6) & 3];
		return r;
		}
		#if defined(SIMDE_SSE_NATIVE) && !defined(__PGI)
		# define simde_mm_shuffle_ps(a, b, imm8) SIMDE__M128_FROM_NATIVE(_mm_shuffle_ps(a.n, b.n, imm8))
		#elif defined(SIMDE__SHUFFLE_VECTOR)
		@@ -2454,6 +2404,17 @@ simde_mm_shuffle_ps (simde__m128 a, simde__m128 b, const int imm8) {
		(((imm8) >> 2) & 3), \
		(((imm8) >> 4) & 3) + 4, \
		(((imm8) >> 6) & 3) + 4) }; }))
		#else
		SIMDE__FUNCTION_ATTRIBUTES
		simde__m128
		simde_mm_shuffle_ps (simde__m128 a, simde__m128 b, const int imm8) {
		simde__m128 r;
		r.f32[0] = a.f32[(imm8 >> 0) & 3];
		r.f32[1] = a.f32[(imm8 >> 2) & 3];
		r.f32[2] = b.f32[(imm8 >> 4) & 3];
		r.f32[3] = b.f32[(imm8 >> 6) & 3];
		return r;
		}
		#endif
		#if defined(SIMDE_SSE_ENABLE_NATIVE_ALIASES)
		# define _mm_shuffle_ps(a, b, imm8) SIMDE__M128_TO_NATIVE(simde_mm_shuffle_ps(SIMDE__M128_FROM_NATIVE(a), SIMDE__M128_FROM_NATIVE(b), imm8))

simde/x86/sse2.h

+31 −25

Original line number	Diff line number	Diff line
		@@ -181,8 +181,6 @@ typedef union {
		#if defined(SIMDE_SSE2_NATIVE)
		HEDLEY_STATIC_ASSERT(sizeof(__m128i) == sizeof(simde__m128i), "__m128i size doesn't match simde__m128i size");
		HEDLEY_STATIC_ASSERT(sizeof(__m128d) == sizeof(simde__m128d), "__m128d size doesn't match simde__m128d size");
		SIMDE__FUNCTION_ATTRIBUTES simde__m128i SIMDE__M128I_C(__m128i v) { simde__m128i r; r.n = v; return r; }
		SIMDE__FUNCTION_ATTRIBUTES simde__m128d SIMDE__M128D_C(__m128d v) { simde__m128d r; r.n = v; return r; }
		#elif defined(SIMDE_SSE_NEON)
		#define SIMDE__M128I_NEON_C(T, expr) (simde__m128i) { .neon_##T = expr }
		#define SIMDE__M128D_NEON_C(T, expr) (simde__m128d) { .neon_##T = expr }
		@@ -505,7 +503,7 @@ simde_mm_andnot_pd (simde__m128d a, simde__m128d b) {
		simde__m128d r;

		#if defined(SIMDE_SSE2_NATIVE)
		return SIMDE__M128D_C(_mm_andnot_pd(a.n, b.n));
		return SIMDE__M128D_FROM_NATIVE(_mm_andnot_pd(a.n, b.n));
		#elif defined(SIMDE_SSE2_NEON)
		r.neon_i32 = vbicq_s32(a.neon_i32, b.neon_i32);
		#else
		@@ -615,7 +613,7 @@ simde_mm_bslli_si128 (simde__m128i a, const int imm8) {
		return r;
		}
		#if defined(SIMDE_SSE2_NATIVE) && !defined(__PGI)
		# define simde_mm_bslli_si128(a, imm8) SIMDE__M128I_C(_mm_slli_si128(a.n, imm8))
		# define simde_mm_bslli_si128(a, imm8) SIMDE__M128I_FROM_NATIVE(_mm_slli_si128(a.n, imm8))
		#elif defined(SIMDE_SSE2_NEON)
		# define simde_mm_bslli_si128(a, imm8) \
		SIMDE__M128I_NEON_C(i8, (((imm8) <= 0) ? ((a).neon_i8) : (((imm8) > 15) ? (vdupq_n_s8(0)) : (vextq_s8(vdupq_n_s8(0), (a).neon_i8, 16 - (imm8))))))
		@@ -654,7 +652,7 @@ simde_mm_bsrli_si128 (simde__m128i a, const int imm8) {
		return r;
		}
		#if defined(SIMDE_SSE2_NATIVE) && !defined(__PGI)
		# define simde_mm_bsrli_si128(a, imm8) SIMDE__M128I_C(_mm_srli_si128(a.n, imm8))
		# define simde_mm_bsrli_si128(a, imm8) SIMDE__M128I_FROM_NATIVE(_mm_srli_si128(a.n, imm8))
		#elif defined(SIMDE_SSE2_NEON)
		# define simde_mm_bsrli_si128(a, imm8) \
		SIMDE__M128I_NEON_C(i8, ((imm8) <= 0) ? ((a).neon_i8) : (((imm8) > 15) ? (vdupq_n_s8(0)) : (vextq_s8((a).neon_i8, vdupq_n_s8(0), (imm8)))))
		@@ -778,7 +776,7 @@ SIMDE__FUNCTION_ATTRIBUTES
		simde__m128i
		simde_mm_castpd_si128 (simde__m128d a) {
		#if defined(SIMDE_SSE2_NATIVE)
		return SIMDE__M128I_C(_mm_castpd_si128(a.n));
		return SIMDE__M128I_FROM_NATIVE(_mm_castpd_si128(a.n));
		#else
		union {
		simde__m128d pd;
		@@ -796,7 +794,7 @@ SIMDE__FUNCTION_ATTRIBUTES
		simde__m128d
		simde_mm_castps_pd (simde__m128 a) {
		#if defined(SIMDE_SSE2_NATIVE)
		return SIMDE__M128D_C(_mm_castps_pd(a.n));
		return SIMDE__M128D_FROM_NATIVE(_mm_castps_pd(a.n));
		#else
		union {
		simde__m128 ps;
		@@ -816,7 +814,7 @@ simde_mm_castps_si128 (simde__m128 a) {
		simde__m128i r;

		#if defined(SIMDE_SSE2_NATIVE)
		return SIMDE__M128I_C(_mm_castps_si128(a.n));
		return SIMDE__M128I_FROM_NATIVE(_mm_castps_si128(a.n));
		#elif defined(SIMDE_SSE2_NEON)
		r.neon_i32 = a.neon_i32;
		#else
		@@ -835,7 +833,7 @@ simde_mm_castsi128_pd (simde__m128i a) {
		simde__m128d r;

		#if defined(SIMDE_SSE2_NATIVE)
		return SIMDE__M128D_C(_mm_castsi128_pd(a.n));
		return SIMDE__M128D_FROM_NATIVE(_mm_castsi128_pd(a.n));
		#else
		r = HEDLEY_REINTERPRET_CAST(simde__m128d, a);
		#endif
		@@ -1479,7 +1477,7 @@ simde_mm_cvtepi32_pd (simde__m128i a) {
		simde__m128d r;

		#if defined(SIMDE_SSE2_NATIVE)
		r = SIMDE__M128D_C(_mm_cvtepi32_pd(a.n));
		r = SIMDE__M128D_FROM_NATIVE(_mm_cvtepi32_pd(a.n));
		#elif defined(SIMDE__CONVERT_VECTOR)
		SIMDE__CONVERT_VECTOR(r.f64, a.m64[0].i32);
		#else
		@@ -1525,7 +1523,7 @@ simde_mm_cvtpd_epi32 (simde__m128d a) {
		simde__m128i r;

		#if defined(SIMDE_SSE2_NATIVE)
		r = SIMDE__M128I_C(_mm_cvtpd_epi32(a.n));
		r = SIMDE__M128I_FROM_NATIVE(_mm_cvtpd_epi32(a.n));
		#elif defined(SIMDE__CONVERT_VECTOR)
		SIMDE__CONVERT_VECTOR(r.m64[0].i32, a.f64);
		r.m64[1] = simde_mm_setzero_si64();
		@@ -1655,6 +1653,8 @@ simde_mm_cvtps_pd (simde__m128 a) {

		#if defined(SIMDE_SSE2_NATIVE)
		r.n = _mm_cvtps_pd(a.n);
		#elif defined(SIMDE__CONVERT_VECTOR)
		SIMDE__CONVERT_VECTOR(r.f64, a.m64[0].f32);
		#else
		SIMDE__VECTORIZE
		for (size_t i = 0 ; i < (sizeof(r.f64) / sizeof(r.f64[0])) ; i++) {
		@@ -1695,7 +1695,7 @@ simde_mm_cvtsd_si32 (simde__m128d a) {
		#endif

		SIMDE__FUNCTION_ATTRIBUTES
		int32_t
		int64_t
		simde_mm_cvtsd_si64 (simde__m128d a) {
		#if defined(SIMDE_SSE2_NATIVE) && defined(SIMDE_ARCH_AMD64)
		#if defined(__PGI)
		@@ -1901,6 +1901,8 @@ simde_mm_cvttpd_pi32 (simde__m128d a) {

		#if defined(SIMDE_SSE2_NATIVE)
		r.n = _mm_cvttpd_pi32(a.n);
		#elif defined(SIMDE__CONVERT_VECTOR)
		SIMDE__CONVERT_VECTOR(r.i32, a.f64);
		#else
		for (size_t i = 0 ; i < (sizeof(r.i32) / sizeof(r.i32[0])) ; i++) {
		r.i32[i] = SIMDE_CONVERT_FTOI(int32_t, trunc(a.f64[i]));
		@@ -1922,6 +1924,8 @@ simde_mm_cvttps_epi32 (simde__m128 a) {
		r.n = _mm_cvttps_epi32(a.n);
		#elif defined(SIMDE_SSE2_NEON)
		r.neon_i32 = vcvtq_s32_f32(a.neon_f32);
		#elif defined(SIMDE__CONVERT_VECTOR)
		SIMDE__CONVERT_VECTOR(r.i32, a.f32);
		#else
		for (size_t i = 0 ; i < (sizeof(r.i32) / sizeof(r.i32[0])) ; i++) {
		r.i32[i] = SIMDE_CONVERT_FTOI(int32_t, truncf(a.f32[i]));
		@@ -1973,6 +1977,8 @@ simde_mm_div_pd (simde__m128d a, simde__m128d b) {

		#if defined(SIMDE_SSE2_NATIVE)
		r.n = _mm_div_pd(a.n, b.n);
		#elif defined(SIMDE__ENABLE_GCC_VEC_EXT)
		r.f64 = a.f64 / b.f64;
		#else
		SIMDE__VECTORIZE
		for (size_t i = 0 ; i < (sizeof(r.f64) / sizeof(r.f64[0])) ; i++) {
		@@ -2025,7 +2031,7 @@ simde_mm_insert_epi16 (simde__m128i a, int32_t i, const int imm8) {
		return a;
		}
		#if defined(SIMDE_SSE2_NATIVE) && !defined(__PGI)
		# define simde_mm_insert_epi16(a, i, imm8) SIMDE__M128I_C(_mm_insert_epi16((a).n, (i), (imm8)))
		# define simde_mm_insert_epi16(a, i, imm8) SIMDE__M128I_FROM_NATIVE(_mm_insert_epi16((a).n, (i), (imm8)))
		#elif defined(SIMDE_SSE2_NEON)
		# define simde_mm_insert_epi16(a, i, imm8) SIMDE__M128I_NEON_C(i16, vsetq_lane_s16((i), a.neon_i16, (imm8)))
		#endif
		@@ -3457,7 +3463,7 @@ simde_mm_shuffle_epi32 (simde__m128i a, const int imm8) {
		return r;
		}
		#if defined(SIMDE_SSE2_NATIVE)
		# define simde_mm_shuffle_epi32(a, imm8) SIMDE__M128I_C(_mm_shuffle_epi32((a).n, (imm8)))
		# define simde_mm_shuffle_epi32(a, imm8) SIMDE__M128I_FROM_NATIVE(_mm_shuffle_epi32((a).n, (imm8)))
		#elif defined(SIMDE__SHUFFLE_VECTOR)
		# define simde_mm_shuffle_epi32(a, imm8) (__extension__ ({ \
		const simde__m128i simde__tmp_a_ = a; \
		@@ -3485,7 +3491,7 @@ simde_mm_shuffle_pd (simde__m128d a, simde__m128d b, const int imm8) {
		return r;
		}
		#if defined(SIMDE_SSE2_NATIVE) && !defined(__PGI)
		# define simde_mm_shuffle_pd(a, b, imm8) SIMDE__M128D_C(_mm_shuffle_pd((a).n, (b).n, (imm8)))
		# define simde_mm_shuffle_pd(a, b, imm8) SIMDE__M128D_FROM_NATIVE(_mm_shuffle_pd((a).n, (b).n, (imm8)))
		#elif defined(SIMDE__SHUFFLE_VECTOR)
		# define simde_mm_shuffle_pd(a, b, imm8) (__extension__ ({ \
		(simde__m128d) { .f64 = \
		@@ -3512,7 +3518,7 @@ simde_mm_shufflehi_epi16 (simde__m128i a, const int imm8) {
		return r;
		}
		#if defined(SIMDE_SSE2_NATIVE)
		# define simde_mm_shufflehi_epi16(a, imm8) SIMDE__M128I_C(_mm_shufflehi_epi16((a).n, (imm8)))
		# define simde_mm_shufflehi_epi16(a, imm8) SIMDE__M128I_FROM_NATIVE(_mm_shufflehi_epi16((a).n, (imm8)))
		#elif defined(SIMDE__SHUFFLE_VECTOR)
		# define simde_mm_shufflehi_epi16(a, imm8) (__extension__ ({ \
		const simde__m128i simde__tmp_a_ = a; \
		@@ -3543,7 +3549,7 @@ simde_mm_shufflelo_epi16 (simde__m128i a, const int imm8) {
		return r;
		}
		#if defined(SIMDE_SSE2_NATIVE)
		# define simde_mm_shufflelo_epi16(a, imm8) SIMDE__M128I_C(_mm_shufflelo_epi16((a).n, (imm8)))
		# define simde_mm_shufflelo_epi16(a, imm8) SIMDE__M128I_FROM_NATIVE(_mm_shufflelo_epi16((a).n, (imm8)))
		#elif defined(SIMDE__SHUFFLE_VECTOR)
		# define simde_mm_shufflelo_epi16(a, imm8) (__extension__ ({ \
		const simde__m128i simde__tmp_a_ = a; \
		@@ -3757,7 +3763,7 @@ simde_mm_srai_epi16 (simde__m128i a, const int imm8) {
		return r;
		}
		#if defined(SIMDE_SSE2_NATIVE)
		# define simde_mm_srai_epi16(a, imm8) SIMDE__M128I_C(_mm_srai_epi16((a).n, (imm8)));
		# define simde_mm_srai_epi16(a, imm8) SIMDE__M128I_FROM_NATIVE(_mm_srai_epi16((a).n, (imm8)));
		#endif
		#if defined(SIMDE_SSE2_ENABLE_NATIVE_ALIASES)
		# define _mm_srai_epi16(a, imm8) SIMDE__M128I_TO_NATIVE(simde_mm_srai_epi16(SIMDE__M128I_FROM_NATIVE(a), imm8))
		@@ -3777,7 +3783,7 @@ simde_mm_srai_epi32 (simde__m128i a, int imm8) {
		return r;
		}
		#if defined(SIMDE_SSE2_NATIVE)
		# define simde_mm_srai_epi32(a, imm8) SIMDE__M128I_C(_mm_srai_epi32((a).n, (imm8)))
		# define simde_mm_srai_epi32(a, imm8) SIMDE__M128I_FROM_NATIVE(_mm_srai_epi32((a).n, (imm8)))
		#elif defined(SIMDE_SSE2_NEON)
		# define simde_mm_srai_epi32(a, imm8) SIMDE__M128I_NEON_C(i32, ((imm8) <= 0) ? (a.neon_i32) : (((imm8) > 31) ? (vshrq_n_s32(vshrq_n_s32(a.neon_i32, 16), 16)) : (vshrq_n_s32(a.neon_i32, (imm8)))))
		#endif
		@@ -3841,7 +3847,7 @@ simde_mm_slli_epi16 (simde__m128i a, const int imm8) {
		return r;
		}
		#if defined(SIMDE_SSE2_NATIVE)
		# define simde_mm_slli_epi16(a, imm8) SIMDE__M128I_C(_mm_slli_epi16(a.n, imm8));
		# define simde_mm_slli_epi16(a, imm8) SIMDE__M128I_FROM_NATIVE(_mm_slli_epi16(a.n, imm8));
		#elif defined(SIMDE_SSE2_NEON)
		# define simde_mm_slli_epi16(a, imm8) \
		SIMDE__M128I_NEON_C(i16, ((imm8) <= 0) ? ((a).neon_i16) : (((imm8) > 31) ? (vdupq_n_s16(0)) : (vshlq_n_s16((a).neon_i16, (imm8)))))
		@@ -3862,7 +3868,7 @@ simde_mm_slli_epi32 (simde__m128i a, const int imm8) {
		return r;
		}
		#if defined(SIMDE_SSE2_NATIVE)
		# define simde_mm_slli_epi32(a, imm8) SIMDE__M128I_C(_mm_slli_epi32(a.n, imm8));
		# define simde_mm_slli_epi32(a, imm8) SIMDE__M128I_FROM_NATIVE(_mm_slli_epi32(a.n, imm8));
		#elif defined(SIMDE_SSE2_NEON)
		# define simde_mm_slli_epi32(a, imm8) \
		SIMDE__M128I_NEON_C(i32, ((imm8) <= 0) ? ((a).neon_i32) : (((imm8) > 31) ? (vdupq_n_s32(0)) : (vshlq_n_s32((a).neon_i32, (imm8)))))
		@@ -3883,7 +3889,7 @@ simde_mm_slli_epi64 (simde__m128i a, const int imm8) {
		return r;
		}
		#if defined(SIMDE_SSE2_NATIVE)
		# define simde_mm_slli_epi64(a, imm8) SIMDE__M128I_C(_mm_slli_epi64(a.n, imm8));
		# define simde_mm_slli_epi64(a, imm8) SIMDE__M128I_FROM_NATIVE(_mm_slli_epi64(a.n, imm8));
		#endif
		#if defined(SIMDE_SSE2_ENABLE_NATIVE_ALIASES)
		# define _mm_slli_epi64(a, imm8) SIMDE__M128I_TO_NATIVE(simde_mm_slli_epi64(SIMDE__M128I_FROM_NATIVE(a), imm8))
		@@ -3901,7 +3907,7 @@ simde_mm_srli_epi16 (simde__m128i a, const int imm8) {
		return r;
		}
		#if defined(SIMDE_SSE2_NATIVE)
		# define simde_mm_srli_epi16(a, imm8) SIMDE__M128I_C(_mm_srli_epi16(a.n, imm8));
		# define simde_mm_srli_epi16(a, imm8) SIMDE__M128I_FROM_NATIVE(_mm_srli_epi16(a.n, imm8));
		#elif defined(SIMDE_SSE2_NEON)
		# define simde_mm_srli_epi16(a, imm8) \
		SIMDE__M128I_NEON_C(u16, ((imm8) <= 0) ? ((a).neon_u16) : (((imm8) > 31) ? (vdupq_n_u16(0)) : (vshrq_n_u16((a).neon_u16, (imm8)))))
		@@ -3922,7 +3928,7 @@ simde_mm_srli_epi32 (simde__m128i a, const int imm8) {
		return r;
		}
		#if defined(SIMDE_SSE2_NATIVE)
		# define simde_mm_srli_epi32(a, imm8) SIMDE__M128I_C(_mm_srli_epi32(a.n, imm8))
		# define simde_mm_srli_epi32(a, imm8) SIMDE__M128I_FROM_NATIVE(_mm_srli_epi32(a.n, imm8))
		#elif defined(SIMDE_SSE2_NEON)
		# define simde_mm_srli_epi32(a, imm8) \
		SIMDE__M128I_NEON_C(u32, ((imm8) <= 0) ? ((a).neon_u32) : (((imm8) > 31) ? (vdupq_n_u32(0)) : (vshrq_n_u32((a).neon_u32, (imm8)))))
		@@ -3947,7 +3953,7 @@ simde_mm_srli_epi64 (simde__m128i a, const int imm8) {
		return r;
		}
		#if defined(SIMDE_SSE2_NATIVE)
		# define simde_mm_srli_epi64(a, imm8) SIMDE__M128I_C(_mm_srli_epi64(a.n, imm8))
		# define simde_mm_srli_epi64(a, imm8) SIMDE__M128I_FROM_NATIVE(_mm_srli_epi64(a.n, imm8))
		#elif defined(SIMDE_SSE2_NEON)
		# define simde_mm_srli_epi64(a, imm8) \
		SIMDE__M128I_NEON_C(u64, (((imm8)&255) < 0 \|\| ((imm8)&255) > 63) ? (vdupq_n_u64(0)) : ((((imm8)&255) == 0) ? (a.neon_u64) : (vshrq_n_u64((a).neon_u64, (imm8)&255))))