Commit bd24d2fd authored by Aaron Plattner's avatar Aaron Plattner

Update nvml.h

parent 3722e02d
......@@ -200,23 +200,6 @@ typedef struct nvmlProcessInfo_st
//! because Windows KMD manages all the memory and not the NVIDIA driver
} nvmlProcessInfo_t;
/**
* XIDs error attributes for a given device
*/
typedef struct nvmlXidEntry_st
{
unsigned int xidTimeStamp; //! Timestamp of the Xid Error occurrence
unsigned int xidNumber; //! Number of Xid currently present on device's Inforom
}nvmlXidEntry_t;
typedef struct nvmlXidData_st
{
unsigned int xidFirstEntryCount; //! Number of entries that are populated in xidFirstEntry.
nvmlXidEntry_t xidFirstEntry[10]; //! Array of entries of the first Xids encountered since the Inforom was last flashed.
unsigned int xidLastEntryCount; //! Number of entries that are populated in xidLastEntry.
nvmlXidEntry_t xidLastEntry[10]; //! Array of entries of the most recent Xid errors that have occurred.
}nvmlXidData_t;
/**
* Enum to represent type of bridge chip
*/
......@@ -907,8 +890,10 @@ typedef enum nvmlGpuVirtualizationMode {
#define NVML_FI_DEV_PERF_POLICY_TOTAL_APP_CLOCKS 80 //!< Perf Policy Counter for Total App Clock Policy
#define NVML_FI_DEV_PERF_POLICY_TOTAL_BASE_CLOCKS 81 //!< Perf Policy Counter for Total Base Clocks Policy
/* Memory temperatures */
#define NVML_FI_DEV_MEMORY_TEMP 82 //!< Memory temperature for the device
#define NVML_FI_MAX 82 //!< One greater than the largest field ID defined above
#define NVML_FI_MAX 83 //!< One greater than the largest field ID defined above
/**
* Information for a Field Value Sample
......@@ -1159,9 +1144,6 @@ typedef struct nvmlEventData_st
*/
#define nvmlClocksThrottleReasonSyncBoost 0x0000000000000010LL
/** Some other unspecified factor is reducing the clocks */
#define nvmlClocksThrottleReasonUnknown 0x8000000000000000LL
/** Bit mask representing no clocks throttling
*
* Clocks are as high as possible.
......@@ -1177,8 +1159,7 @@ typedef struct nvmlEventData_st
| nvmlClocksThrottleReasonSwPowerCap \
| nvmlClocksThrottleReasonHwSlowdown \
| nvmlClocksThrottleReasonSyncBoost \
| nvmlClocksThrottleReasonUnknown \
)
)
/** @} */
/***************************************************************************************************/
......@@ -2166,21 +2147,6 @@ nvmlReturn_t DECLDIR nvmlSystemGetTopologyGpuSet(unsigned int cpuNumber, unsigne
*/
nvmlReturn_t DECLDIR nvmlDeviceGetP2PStatus(nvmlDevice_t device1, nvmlDevice_t device2, nvmlGpuP2PCapsIndex_t p2pIndex,nvmlGpuP2PStatus_t *p2pStatus);
/**
* Retrieves the XID Error List reported by RM on a per GPU basis
*
* @param device The device being queried
* @param xidData The list of the actual XID Error numbers and timestamps
*
*
* @return
* - \ref NVML_SUCCESS if the xidCount or xidErrorList have been populated
* - \ref NVML_ERROR_INVALID_ARGUMENT if the device is invalid
* - \ref NVML_ERROR_UNKNOWN on any unexpected error
*/
nvmlReturn_t DECLDIR nvmlDeviceGetXidErrors(nvmlDevice_t device, nvmlXidData_t *xidData);
/**
* Retrieves the globally unique immutable UUID associated with this device, as a 5 part hexadecimal string,
* that augments the immutable, board serial identifier.
......
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