1. 31 Aug, 2022 1 commit
  2. 30 Aug, 2022 2 commits
  3. 21 Aug, 2022 1 commit
  4. 20 Aug, 2022 3 commits
  5. 16 Aug, 2022 2 commits
  6. 15 Aug, 2022 4 commits
  7. 04 Aug, 2022 3 commits
  8. 03 Aug, 2022 1 commit
  9. 11 Jul, 2022 2 commits
  10. 09 Jul, 2022 2 commits
    • Andrzej Ratajewski's avatar
      [Autobackout][FuncReg]Revert of change: a7461055 · ff6d3189
      Andrzej Ratajewski authored
       Avoid generating private branch for generic accesses
      
      This change fixes an incorrect condition which was causing generation
      of branch for private memory even if allocatePrivateAsGlobalBuffer was
      enabled.
      
      This change also implements back `-cl-intel-no-local-to-generic` option
      which was removed in ee325d492f12192a8fc58f440469d2204da1eeca.
      ff6d3189
    • Daniel Man's avatar
      [Autobackout][FuncReg]Revert of change: ceb8220d · 8979657e
      Daniel Man authored
       Adds vISA option to enable JSON shader dump.
      
      Adds vISA option to enable JSON shader dump.
      8979657e
  11. 08 Jul, 2022 9 commits
  12. 07 Jul, 2022 10 commits
    • Daniel Man's avatar
      Adds vISA option to enable JSON shader dump. · ceb8220d
      Daniel Man authored
      Adds vISA option to enable JSON shader dump.
      ceb8220d
    • Kaiyu Chen's avatar
      Add VC BiF support for rnde. · d8fd1165
      Kaiyu Chen authored
      Add roundne function to CMCL math library and builtin translation support
      for SPIR-V.
      d8fd1165
    • Kaushik, Anirudh's avatar
      Minor refactoring for send message instruction and · fadd2203
      Kaushik, Anirudh authored
      descriptor construction
      
      Minor code changes for send message descriptor and instruction
      construction for sampler operations.
      fadd2203
    • Pete Chou's avatar
      Make RA verifier consider region access in src verification. · 313f59f8
      Pete Chou authored
      To match the behavior of dst verification, we should also do the same
      thing on src as well.
      313f59f8
    • Gang Y Chen's avatar
      latency scheduling add hold-list · 85983676
      Gang Y Chen authored
      real latency scheduling needs hold-list
      not enabled yet, controlled by scheduler-config
      85983676
    • pratikashar's avatar
      Bug fixes to loop variable splitting · ab5a7cfa
      pratikashar authored
      * When a variable is split in multiple loops, fix problem where split
        pass reused stale LOOP_SPLIT variable across loops.
      * Fix logic to copy accurately across dcl sizes.
      ab5a7cfa
    • Lukasz Stalmirski's avatar
      Refactor dual-SIMD8 pixel shader support check. · 714f2204
      Lukasz Stalmirski authored
      Refactor dual-SIMD8 pixel shader support check.
      714f2204
    • Artem Gindinson's avatar
      Rework kernel metadata handling in SPIR-V Reader · 6a13fa90
      Artem Gindinson authored
      After the introduction of kernel entry point wrappers within
      KhronosGroup/SPIRV-LLVM-Translator@85815e7, initial approach to avoiding kernel
      metadata duplication within our internal SPIR-V consumer has been to skip
      metadata generation whenever we encounter the entry point kernel (we would
      assume that all necessary metadata had already been assigned to the LLVM
      function upon encountering the "actual" SPIR-V kernel). For more details on the
      initial approach, see intel/intel-graphics-compiler@12332c1.
      
      The change, however, did not take into account that all SPIR-V information
      regarding the kernel execution mode was being stored exclusively for the entry
      point wrapper kernel. Therefore, by skipping the SPIR-V entry point wrappers we
      end up losing certain metadata entries, e.g. "required WG size".
      
      Assume that the entry point wrappers contain fuller information and generate
      LLVM metadata based on these SPIR-V functions instead. This fixes kernel
      attributes' lowering with LLVM 14.
      
      An alternative SPIR-V Reader solution would imply copying over all SPIR-V
      information from entry point wrappers to the actual kernel body, and then
      dropping entry point wrappers from the `SPIRVModule`'s/`SPIRVToLLVM`'s
      function collections.
      6a13fa90
    • Lukasz Stalmirski's avatar
      [Autobackout][FuncReg]Revert of change: 87469fe1 · 3bbca976
      Lukasz Stalmirski authored
       Refactor dual-SIMD8 pixel shader support check.
      
      Refactor dual-SIMD8 pixel shader support check.
      3bbca976
    • Tim Bauer's avatar
      vISA minor barrier refactor · a9b55ac5
      Tim Bauer authored
      Minor barrier refactor in vISA; minor refactor to report IGA issues from vISA
      Adds predication support to certain gateway messages.
      a9b55ac5