Commit 01858acd authored by Chen, Weiyu's avatar Chen, Weiyu Committed by gbsbuild

Use correct vISA variable size for simd8 typed write

Change-Id: I3accbbd6ae6a8287dbf19cbb01c2dcb99daf4aa0
parent 5e56da05
......@@ -11127,7 +11127,7 @@ void EmitPass::emitTypedWrite(llvm::Instruction* pInsn)
for (uint i = 0; i < 2; ++i)
{
CVariable* pPayload = m_currShader->GetNewVariable(
parameterLength * numLanes(m_currShader->m_SIMDSize),
parameterLength * numLanes(SIMDMode::SIMD8),
ISA_TYPE_F,
IGC::EALIGN_GRF);
m_encoder->SetSimdSize(SIMDMode::SIMD8);
......
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