Commit 59ffbb37 authored by pmistry's avatar pmistry Committed by gbsbuild

If the shader has 4 vertices. Given pass analyzes it to see if it constitutes...

If the shader has 4 vertices. Given pass analyzes it to see if it constitutes a perfect rectangle. If so it gives a hint to driver for setting PRIMITIVE topology to RECT_LIST.

Change-Id: Iac5d1aad3eb6c77a0d0ad9bb04de2d9e6cc97090
parent 479473b3
......@@ -81,6 +81,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "Compiler/Optimizer/OpenCLPasses/UndefinedReferences/UndefinedReferencesPass.hpp"
#include "Compiler/Optimizer/OpenCLPasses/StatelessToStatefull/StatelessToStatefull.hpp"
#include "Compiler/Optimizer/MCSOptimization.hpp"
#include "Compiler/Optimizer/RectListOptimizationPass.hpp"
#include "Compiler/Optimizer/GatingSimilarSamples.hpp"
#include "Compiler/MetaDataApi/PurgeMetaDataUtils.hpp"
......@@ -1302,6 +1303,9 @@ void OptimizeIR(CodeGenContext* pContext)
mpm.add(CreateMCSOptimization());
if(pContext->type == ShaderType::GEOMETRY_SHADER)
mpm.add(createRectListOptimizationPass());
mpm.add(CreateGatingSimilarSamples());
if (IGC_GET_FLAG_VALUE(FunctionControl) != FLAG_FCALL_FORCE_INLINE)
......
......@@ -328,6 +328,8 @@ namespace IGC
bool StaticOutput;
DWORD m_AccessedBySampleC[4];
bool m_bCanEnableRectList;
};
struct SComputeShaderKernelProgram : SKernelProgram
......
......@@ -18,7 +18,9 @@ set(IGC_BUILD__SRC__Optimizer
"${CMAKE_CURRENT_SOURCE_DIR}/FixFastMathFlags.cpp"
"${CMAKE_CURRENT_SOURCE_DIR}/CodeAssumption.cpp"
"${CMAKE_CURRENT_SOURCE_DIR}/MarkReadOnlyLoad.cpp"
"${CMAKE_CURRENT_SOURCE_DIR}/RectListOptimizationPass.cpp"
)
set(IGC_BUILD__SRC__Compiler_Optimizer
${IGC_BUILD__SRC__Optimizer}
${IGC_BUILD__SRC__Optimizer_OpenCLPasses}
......@@ -39,6 +41,7 @@ set(IGC_BUILD__HDR__Optimizer
"${CMAKE_CURRENT_SOURCE_DIR}/SetMathPrecisionForPositionOutput.hpp"
"${CMAKE_CURRENT_SOURCE_DIR}/FixFastMathFlags.hpp"
"${CMAKE_CURRENT_SOURCE_DIR}/CodeAssumption.hpp"
"${CMAKE_CURRENT_SOURCE_DIR}/RectListOptimizationPass.hpp"
)
......
This diff is collapsed.
/*===================== begin_copyright_notice ==================================
Copyright (c) 2017 Intel Corporation
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
======================= end_copyright_notice ==================================*/
#pragma once
#include "common/LLVMWarningsPush.hpp"
#include <llvm/Pass.h>
#include "common/LLVMWarningsPop.hpp"
namespace IGC
{
llvm::Pass* createRectListOptimizationPass();
}
......@@ -118,6 +118,8 @@ DECLARE_IGC_REGKEY(DWORD,FoldsToZeroPropThreshold, 2, "Set the threshol
DECLARE_IGC_REGKEY(DWORD,FoldsToConstPropThreshold, 2, "Set the threshold for finding interesting constant. This is for the number of instructions that gets folded to constant when propagating a dynamic constant value")
DECLARE_IGC_REGKEY(bool, DynamicConstFoldProcessLoops, false, "Dynamic Constant Folding: Enable finding interesting constants in loops")
DECLARE_IGC_REGKEY(bool, DisableDynamicConstantFolding, true, "Disable Dynamic Constant Folding")
DECLARE_IGC_REGKEY(bool, DisableRectListOpt, false, "Disable Rect List optimization")
DECLARE_IGC_REGKEY(bool, DispatchOCLWGInOrder, false, "If set, dispatch HW threads based on the linearized order of WI in a WG; ie, localID(lane[x])=localID(lane[x-1])+1; 1st thread's localID[lane[0])=0.")
DECLARE_IGC_REGKEY(DWORD, CodeAssumption, 1, \
"If set (> 0), generate llvm.assume to help certain optimizations. It is OCL only for now. \
......
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