Commit 6e234cae authored by Artur Harasimiuk's avatar Artur Harasimiuk Committed by Lukasz Wesierski

Synchronisation between branches.

Change-Id: I1f146428996f7d8d4e225a5a0832f165d4075f35
parent 36c8bf8d
......@@ -28,7 +28,7 @@
#cmakedefine FCL_LIBRARY_NAME "${FCL_LIBRARY_NAME}64.dll"
#elif defined(_WIN32)
#cmakedefine IGC_LIBRARY_NAME "${IGC_LIBRARY_NAME}32.dll"
#cmakedefine FCL_LIBRARY_NAME "${FCL_LIBRARY_NAME}64.dll"
#cmakedefine FCL_LIBRARY_NAME "${FCL_LIBRARY_NAME}32.dll"
#else
#cmakedefine IGC_LIBRARY_NAME "lib${IGC_LIBRARY_NAME}.so"
#cmakedefine FCL_LIBRARY_NAME "lib${FCL_LIBRARY_NAME}.so"
......
......@@ -1035,4 +1035,4 @@ set_property(TARGET "${IGC_BUILD__PROJ__BiFModule_OCL}" PROPERTY PROJECT_LABEL "
# ======================================================================================================
# ======================================================================================================
# ======================================================================================================
\ No newline at end of file
# ======================================================================================================
/* @(#)fdlibm.h 1.5 04/04/22 */
/*===================== begin_copyright_notice ==================================
Copyright (C) 2004 by Sun Microsystems, Inc. All rights reserved.
......
......@@ -49,3 +49,4 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
//*****************************************************************************/
//#include "IBiF_Image_Atomics.cl"
......@@ -1488,3 +1488,4 @@ float __attribute__((overloadable)) intel_atomic_xchg (image2d_array_depth_t i
#ifdef cl_intel_subgroups_ballot
uint intel_sub_group_ballot(bool p);
#endif
......@@ -53,27 +53,6 @@ endif()
if(NOT DEFINED LLVM_VERSION_MAJOR)
set(LLVM_VERSION_MAJOR 4)
#set(LLVM_VERSION_MAJOR 7)
endif()
if(NOT DEFINED LLVM_VERSION_MINOR)
set(LLVM_VERSION_MINOR 0)
endif()
if(NOT DEFINED LLVM_VERSION_PATCH)
set(LLVM_VERSION_PATCH 0)
endif()
if(NOT DEFINED LLVM_VERSION_SUFFIX)
set(LLVM_VERSION_SUFFIX "")
endif()
if (NOT PACKAGE_VERSION)
set(PACKAGE_VERSION
"${LLVM_VERSION_MAJOR}.${LLVM_VERSION_MINOR}.${LLVM_VERSION_PATCH}${LLVM_VERSION_SUFFIX}")
endif()
# ======================================================================================================
# ================================================ UTILS ===============================================
# ======================================================================================================
......
......@@ -4269,8 +4269,15 @@ void CEncoder::Compile()
context->type == ShaderType::COMPUTE_SHADER )&&
m_program->m_dispatchSize == SIMDMode::SIMD16)
{
m_program->m_sendStallCycle = jitInfo->sendStallCycle;
m_program->m_staticCycle = jitInfo->staticCycle;
uint sendStallCycle = 0;
uint staticCycle = 0;
for (uint i = 0; i < jitInfo->BBNum; i++)
{
sendStallCycle += jitInfo->BBInfo[i].sendStallCycle;
staticCycle += jitInfo->BBInfo[i].staticCycle;
}
m_program->m_sendStallCycle = sendStallCycle;
m_program->m_staticCycle = staticCycle;
}
if (jitInfo->isSpill && AvoidRetryOnSmallSpill())
......@@ -5174,7 +5181,6 @@ void CEncoder::SendVideoAnalytic(
V( vKernel->AppendVISAVABooleanCentroid( surfaceOpnd, uOffset, vOffset, wSize, hSize, vaOutput ) );
break;
default:
inst->dump();
assert( 0 && "Trying to emit unrecognized video analytic instruction (listed above)" );
break;
};
......
......@@ -550,6 +550,20 @@ bool LiveVars::isLiveAt(Value *VL, Instruction *MI) {
bool LiveVars::isLiveOut(Value *VL, const BasicBlock &MBB) {
LiveVars::LVInfo &VI = getLVInfo(VL);
if (isa<Instruction>(VL) && VI.AliveBlocks.empty())
{
// a local value does not live out of any BB.
// (Originally, this function might be for checking non-local
// value. Adding this code to make it work for any value.)
Instruction* I = cast<Instruction>(VL);
if (VI.Kills.size() == 1) {
BasicBlock *killBB = VI.Kills[0]->getParent();
if (killBB == I->getParent()) {
return false;
}
}
}
// Loop over all of the successors of the basic block, checking to see if
// the value is either live in the block, or if it is killed in the block.
SmallVector<const BasicBlock*, 8> OpSuccBlocks;
......
......@@ -110,6 +110,7 @@ public:
m_GTSystemInfo.SubSliceCount = gtSystemInfo.SubSliceCount;
m_GTSystemInfo.TotalPsThreadsWindowerRange = gtSystemInfo.TotalPsThreadsWindowerRange;
m_GTSystemInfo.TotalVsThreads = gtSystemInfo.TotalVsThreads;
m_GTSystemInfo.TotalVsThreads_Pocs = gtSystemInfo.TotalVsThreads_Pocs;
m_GTSystemInfo.TotalDsThreads = gtSystemInfo.TotalDsThreads;
m_GTSystemInfo.TotalGsThreads = gtSystemInfo.TotalGsThreads;
m_GTSystemInfo.TotalHsThreads = gtSystemInfo.TotalHsThreads;
......@@ -136,7 +137,11 @@ public:
return m_platformInfo.eRenderCoreFamily >= IGFX_GEN9_CORE; }
bool supportSamplerCacheResinfo() const { return m_platformInfo.eRenderCoreFamily == IGFX_GEN8_CORE; }
unsigned int getMaxVertexShaderThreads() const { return m_caps.VertexShaderThreads - 1; }
unsigned int getMaxVertexShaderThreads(const bool isPositionOnlyShader) const
{
const unsigned int maxVertexShaderThreads = isPositionOnlyShader ? m_caps.VertexShaderThreadsPosh : m_caps.VertexShaderThreads;
return maxVertexShaderThreads - 1;
}
unsigned int getMaxGeometryShaderThreads() const { return m_caps.GeometryShaderThreads - 1; }
unsigned int getMaxHullShaderThreads() const { return m_caps.HullShaderThreads - 1; }
unsigned int getMaxDomainShaderThreads() const { return m_caps.DomainShaderThreads - 1; }
......
......@@ -709,6 +709,7 @@ void VectorMessage::getInfo(Type *Ty, uint32_t Align, bool useA32,
defaultKind = useA32
? MESSAGE_A32_UNTYPED_SURFACE_RW
: MESSAGE_A64_SCATTERED_RW;
MB = useA32
? A32_UNTYPED_MAX_BYTES
: ((has_8DW_A64_SM && SM == SIMDMode::SIMD8)
......
......@@ -147,6 +147,9 @@ void CShaderProgram::FillProgram(SVertexShaderKernelProgram* pKernelProgram)
void CVertexShader::FillProgram(SVertexShaderKernelProgram* pKernelProgram)
{
assert(entry && entry->getParent());
const bool isPositionOnlyShader = (entry->getParent()->getModuleFlag("IGC::PositionOnlyVertexShader") != nullptr);
ProgramOutput()->m_scratchSpaceUsedByShader = m_ScratchSpaceSize;
pKernelProgram->simd8 = *ProgramOutput();
pKernelProgram->MaxNumInputRegister = GetMaxNumInputRegister();
......@@ -157,7 +160,7 @@ void CVertexShader::FillProgram(SVertexShaderKernelProgram* pKernelProgram)
pKernelProgram->SBEURBReadOffset = GetVertexURBEntryOutputReadOffset();
pKernelProgram->URBAllocationSize = GetURBAllocationSize();
pKernelProgram->hasControlFlow = m_numBlocks > 1 ? true : false;
pKernelProgram->MaxNumberOfThreads = m_Platform->getMaxVertexShaderThreads();
pKernelProgram->MaxNumberOfThreads = m_Platform->getMaxVertexShaderThreads(isPositionOnlyShader);
pKernelProgram->ConstantBufferLoaded = m_constantBufferLoaded;
pKernelProgram->hasVertexID = m_properties.m_HasVertexID;
pKernelProgram->vertexIdLocation = m_properties.m_VID;
......
......@@ -2191,4 +2191,4 @@ Instruction *InstCombiner::visitAddrSpaceCast(AddrSpaceCastInst &CI) {
return commonPointerCastTransforms(CI);
}
#include "common/LLVMWarningsPop.hpp"
\ No newline at end of file
#include "common/LLVMWarningsPop.hpp"
......@@ -81,6 +81,8 @@ static void CreateCompilerCapsString(const GT_SYSTEM_INFO* sysinfo, PLATFORM pla
outputString.append("\n");
outputString.append("TotalVsThreads \t\t= \t");
outputString.append(stringFrom<unsigned int>(sysinfo->TotalVsThreads));
outputString.append("TotalVsThreads_Pocs \t\t= \t");
outputString.append(stringFrom<unsigned int>(sysinfo->TotalVsThreads_Pocs));
outputString.append("\n");
outputString.append("TotalGsThreads \t\t= \t");
outputString.append(stringFrom<unsigned int>(sysinfo->TotalGsThreads));
......@@ -147,6 +149,7 @@ void SetCompilerCaps(SKU_FEATURE_TABLE* pSkuFeatureTable, CPlatform* platform)
caps.PixelShaderThreadsWindowerRange = sysinfo.TotalPsThreadsWindowerRange;
caps.VertexShaderThreads = sysinfo.TotalVsThreads;
caps.VertexShaderThreadsPosh = sysinfo.TotalVsThreads_Pocs;
caps.GeometryShaderThreads = sysinfo.TotalGsThreads;
caps.DomainShaderThreads = sysinfo.TotalDsThreads;
caps.HullShaderThreads = sysinfo.TotalHsThreads;
......
......@@ -72,6 +72,7 @@ STRUCT: S3DHardwareCapabilities
struct SCompilerHwCaps
{
unsigned int VertexShaderThreads;
unsigned int VertexShaderThreadsPosh;
unsigned int HullShaderThreads;
unsigned int DomainShaderThreads;
unsigned int GeometryShaderThreads;
......
......@@ -34,7 +34,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include <llvm/IRReader/IRReader.h>
#include <llvm/Support/SourceMgr.h>
#include "common/LLVMWarningsPop.hpp"
#include "common/Types.hpp"
using namespace IGC;
using namespace IGC::Debug;
......@@ -131,76 +130,3 @@ void DumpLLVMIR(IGC::CodeGenContext* pContext, const char* dumpName)
}
}
}
// This function was implemented due to disability of creating new arguments for
// already existing functions via argument constructor. LLVM 7 does not give us
// such possibility. The only way is to create totally new function with new
// signature and then splice the basic block list.
// BE CAREFUL: this function changes pointer to the function passed as a parameter.
// It is reassigned to the new created function (with an additional parameters).
// The function initially passed as an argument is not needed anymore, because all
// of the basic blocks are spliced to the new function.
std::vector<llvm::Argument *> SpliceFuncWithNewArguments(
llvm::Function* &pSourceFunc,
const std::vector<llvm::Type*>& newArgs,
const std::vector<std::string>& newArgsNames)
{
assert(newArgsNames.size() <= newArgs.size() && "To many arguments names");
std::vector<llvm::Type*> arguments;
// gather all arguments from source function
for (auto& argIter : range(pSourceFunc->arg_begin(), pSourceFunc->arg_end()))
{
arguments.push_back(argIter.getType());
}
// concatenate old arguments and new arguments
arguments.insert(arguments.end(), newArgs.begin(), newArgs.end());
llvm::Function* pNewFunction = llvm::Function::Create(llvm::FunctionType::get(
pSourceFunc->getReturnType(), arguments, false),
pSourceFunc->getLinkage(),
pSourceFunc->getName(),
pSourceFunc->getParent());
pNewFunction->setAttributes(pSourceFunc->getAttributes());
pNewFunction->getBasicBlockList().splice(pNewFunction->begin(), pSourceFunc->getBasicBlockList());
// set names of copied arguments
auto newArg = pNewFunction->arg_begin();
for (auto oldArg = pSourceFunc->arg_begin(),
oldArgEnd = pSourceFunc->arg_end();
oldArg != oldArgEnd;
++oldArg, ++newArg)
{
oldArg->replaceAllUsesWith(&(*newArg));
newArg->takeName(&(*oldArg));
}
// set names for newly added arguments and collect them to the vector
// at this moment, pointer newArg must point to the first new argument
std::vector<llvm::Argument *>newArguments;
for (auto argName = newArgsNames.begin(); newArg != pNewFunction->arg_end(); newArg++)
{
if (argName != newArgsNames.end())
{
newArg->setName(*argName);
argName++;
}
newArguments.push_back(&*newArg);
}
pNewFunction->takeName(pSourceFunc);
pSourceFunc->eraseFromParent();
// reassign function pointer to newly created function (with new arguments)
pSourceFunc = pNewFunction;
assert(newArguments.size() && "This function should create one argument at least.");
return newArguments;
}
llvm::Argument* SpliceFuncWithNewArgument(
llvm::Function* &pSourceFunc,
llvm::Type* newArg,
std::string newArgName)
{
return SpliceFuncWithNewArguments(pSourceFunc, std::vector<llvm::Type*>(1, newArg), std::vector<std::string>(1, newArgName)).at(0);
}
\ No newline at end of file
......@@ -27,10 +27,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#pragma once
#include "common/LLVMWarningsPush.hpp"
#include <llvm/IR/LegacyPassManager.h>
#include <llvm/IR/Function.h>
#include <llvm/IR/Argument.h>
#include "common/LLVMWarningsPop.hpp"
#include "common/Types.hpp"
#include <vector>
#include "Stats.hpp"
#include <string.h>
......@@ -64,11 +61,3 @@ namespace IGC
}
void DumpLLVMIR(IGC::CodeGenContext* pContext, const char* dumpName);
std::vector<llvm::Argument *> SpliceFuncWithNewArguments(
llvm::Function* &pSourceFunc,
const std::vector<llvm::Type*>& newArgs,
const std::vector<std::string>& newArgsNames = std::vector<std::string>());
llvm::Argument* SpliceFuncWithNewArgument(
llvm::Function* &pSourceFunc,
llvm::Type* newArg,
std::string newArgName = "");
......@@ -54,7 +54,7 @@ Example command:
$ git clone -b release_40 https://github.com/llvm-mirror/clang clang_source
$ git clone https://github.com/intel/opencl-clang common_clang
$ git clone https://github.com/intel/llvm-patches llvm_patches
$ git clone -b release_40 https://github.com/llvm-mirror/llvm llvm_source
$ git clone -b release_70 https://github.com/llvm-mirror/llvm llvm_source
$ git clone https://github.com/intel/intel-graphics-compiler igc
$ git clone https://github.com/KhronosGroup/OpenCL-Headers opencl_headers
```
......
......@@ -68,6 +68,7 @@ typedef struct _SUscGTSystemInfo
unsigned int TotalPsThreadsWindowerRange;
unsigned int TotalVsThreads;
unsigned int TotalVsThreads_Pocs;
unsigned int TotalGsThreads;
unsigned int TotalDsThreads;
unsigned int TotalHsThreads;
......@@ -216,6 +217,7 @@ inline void InitializeUscAdapterInfo(
uscAdpaterInfo.UscGTSystemInfo.SubSliceCount = bigGTSystemInfo.SubSliceCount;
uscAdpaterInfo.UscGTSystemInfo.TotalPsThreadsWindowerRange = bigGTSystemInfo.TotalPsThreadsWindowerRange;
uscAdpaterInfo.UscGTSystemInfo.TotalVsThreads = bigGTSystemInfo.TotalVsThreads;
uscAdpaterInfo.UscGTSystemInfo.TotalVsThreads_Pocs = bigGTSystemInfo.TotalVsThreads_Pocs;
uscAdpaterInfo.UscGTSystemInfo.TotalDsThreads = bigGTSystemInfo.TotalDsThreads;
uscAdpaterInfo.UscGTSystemInfo.TotalGsThreads = bigGTSystemInfo.TotalGsThreads;
uscAdpaterInfo.UscGTSystemInfo.TotalHsThreads = bigGTSystemInfo.TotalHsThreads;
......
......@@ -56,7 +56,6 @@ VISA_Type str2type(char *str, int str_len);
Common_ISA_Cond_Mod str2cond(char *str);
VISAAtomicOps str2atomic_opcode(char *op_str);
ISA_Opcode str2opcode(char* op_str);
GenPrecision str2Precision(char *str, int str_len);
VISASampler3DSubOpCode str2SampleOpcode(char* str);
int64_t hexToint(char *hex_str, int str_len);
MEDIA_LD_mod mediaMode(char* str);
......@@ -898,43 +897,6 @@ VISA_Type str2type(char *str, int str_len)
return ISA_TYPE_NUM;
}
GenPrecision str2Precision(char *str, int str_len)
{
if (str_len == 2)
{
char c0 = tolower(str[0]);
char c1 = str[1];
if (c0 == 's')
{
switch (c1) {
default: break; // fall-thru
case '1' : return GenPrecision::S1;
case '2' : return GenPrecision::S2;
case '4' : return GenPrecision::S4;
case '8' : return GenPrecision::S8;
}
} else if (c0 == 'u') {
switch (c1) {
default: break; // fall-thru
case '1' : return GenPrecision::U1;
case '2' : return GenPrecision::U2;
case '4' : return GenPrecision::U4;
case '8' : return GenPrecision::U8;
}
} else if (c0 == 'b') {
c1 = tolower(c1);
if (c1 == 'f') {
// Ignore precision
return GenPrecision::INVALID;
}
}
}
YY_FATAL_ERROR("Invalid Gen Precision");
return GenPrecision::INVALID;
}
// convert "z" to Mod_z
Common_ISA_Cond_Mod str2cond(char *str)
{
......
......@@ -415,11 +415,6 @@
return false;
}
uint32_t getNumThreadPerEU() const
{
return 7;
}
bool hasVxHFloat64b() const
{
return true;
......
# Copyright 2014 Intel Corporation All Rights Reserved.
#
# The source code, information and material ("Material") contained
# herein is owned by Intel Corporation or its suppliers or licensors,
# and title to such Material remains with Intel Corporation or its
# suppliers or licensors. The Material contains proprietary information
# of Intel or its suppliers and licensors. The Material is protected by
# worldwide copyright laws and treaty provisions. No part of the
# Material may be used, copied, reproduced, modified, published,
# uploaded, posted, transmitted, distributed or disclosed in any way
# without Intel's prior express written permission. No license under any
# patent, copyright or other intellectual property rights in the
# Material is granted to or conferred upon you, either expressly, by
# implication, inducement, estoppel or otherwise. Any license under such
# intellectual property rights must be express and approved by Intel in
# writing.
#
# Unless otherwise agreed by Intel in writing, you may not remove or alter
# this notice or any other notice embedded in Materials by Intel or Intel's
# suppliers or licensors in any way.
ufo_local_path := $(call my-dir)
include $(ufo_local_path)/../../../Tools/Linux/ufo-android-includes.mk
ifeq ($(BUILD_TYPE),release)
include $(UFO_CLEAR_VARS)
UFO_LOCAL_PATH := $(ufo_local_path)
UFO_LOCAL_MODULE := libigc_visa_scheduler
UFO_LOCAL_REQUIRED_MODULES :=
UFO_LOCAL_LINKED_MODULES :=
UFO_LOCAL_MODULE_CLASS := STATIC_LIBRARIES
UFO_LOCAL_ACTIVE_CFG := $$(CAP_BUILD_TYPE)$$(INTERNAL)-$$(ARX)
UFO_LOCAL_VCXPROJ_PATH := vISA_LocalScheduler.vcxproj
UFO_LOCAL_VCXPROJ_LIBNAME :=
include $(UFO_BUILD_MODULE)
endif
......@@ -210,11 +210,13 @@ void LocalScheduler::localScheduling()
int buildDDD = 0, listSch = 0;
uint32_t totalCycle = 0;
CM_BB_INFO* bbInfo = (CM_BB_INFO *)mem.alloc(fg.BBs.size() * sizeof(CM_BB_INFO));
memset(bbInfo, 0, fg.BBs.size() * sizeof(CM_BB_INFO));
int i = 0;
const Options *m_options = fg.builder->getOptions();
LatencyTable LT(m_options);
uint32_t staticCycle = 0;
uint32_t sendStallCycle = 0;
for (; ib != bend; ++ib)
{
......@@ -251,8 +253,6 @@ void LocalScheduler::localScheduling()
G4_BB_Schedule schedule(fg.getKernel(), bbMem, tempBB, buildDDD, listSch,
totalCycle, m_options, LT);
staticCycle += schedule.sequentialCycle;
sendStallCycle += schedule.sendStallCycle;
count = 0;
}
count++;
......@@ -272,15 +272,17 @@ void LocalScheduler::localScheduling()
{
G4_BB_Schedule schedule(fg.getKernel(), bbMem, *ib, buildDDD, listSch, totalCycle,
m_options, LT);
staticCycle += schedule.sequentialCycle;
sendStallCycle += schedule.sendStallCycle;
bbInfo[i].id = (*ib)->getId();
bbInfo[i].staticCycle = schedule.sequentialCycle;
bbInfo[i].sendStallCycle = schedule.sendStallCycle;
bbInfo[i].loopNestLevel = (*ib)->getNestLevel();
}
}
i++;
}
FINALIZER_INFO* jitInfo = fg.builder->getJitInfo();
jitInfo->staticCycle = staticCycle;
jitInfo->sendStallCycle = sendStallCycle;
jitInfo->BBInfo = bbInfo;
jitInfo->BBNum = i;
}
void G4_BB_Schedule::dumpSchedule(G4_BB *bb)
......@@ -403,41 +405,59 @@ G4_BB_Schedule::G4_BB_Schedule(G4_Kernel* k, Mem_Manager &m, G4_BB *block,
ddd.DumpDotFile(sstr.str().c_str(), "nodes");
}
#ifdef _DEBUG
// Find the label if there is
std::list<std::string> labelList;
bool firstNonLabelInst = true;
for (INST_LIST_ITER i = bb->begin(); i != bb->end(); ++i)
{
G4_INST* inst = *i;
MUST_BE_TRUE(inst != NULL, ERROR_UNKNOWN);
if (inst->isLabel())
{
MUST_BE_TRUE(firstNonLabelInst, ERROR_UNKNOWN);
continue;
}
firstNonLabelInst = false;
}
#endif
// Update the listing of the basic block with the reordered code.
size_t scheduleSize = scheduledNodes.size();
size_t scheduleInstSize = 0;
size_t origSize = bb->size();
bb->clear();
Node * prevNode = nullptr;
unsigned int HWThreadsPerEU = kernel->fg.builder->getNumThreadPerEU();
for (size_t i = 0; i < scheduleSize; i++)
{
INST_LIST_ITER inst_it = bb->begin();
Node * prevNode = NULL;
unsigned int HWThreadsPerEU
= m_options->getuInt32Option(vISA_HWThreadNumberPerEU);
for (size_t i = 0; i < scheduleSize; i++) {
Node *currNode = scheduledNodes[i];
for (G4_INST *inst : *currNode->getInstructions())
{
bb->push_back(inst);
if (prevNode && !prevNode->isLabel())
{
for (G4_INST *inst : *currNode->getInstructions()) {
(*inst_it) = inst;
scheduleInstSize++;
if (prevNode && !prevNode->isLabel()) {
int32_t stallCycle = (int32_t)currNode->schedTime
- (int32_t)prevNode->schedTime;
if (stallCycle > (int32_t)(prevNode->getOccupancy() * HWThreadsPerEU))
{
if (stallCycle > 0
&& stallCycle > (int32_t)(prevNode->getOccupancy()
* HWThreadsPerEU)) {
sendStallCycle += (stallCycle + HWThreadsPerEU - 1)
/ HWThreadsPerEU;
sequentialCycle += (stallCycle + HWThreadsPerEU - 1)
/ HWThreadsPerEU;
}
}
sequentialCycle += currNode->getOccupancy();
prevNode = currNode;
inst_it++;
}
sequentialCycle += currNode->getOccupancy();
prevNode = currNode;
}
size_t bbInstsSize = bb->size();
MUST_BE_TRUE(origSize == bbInstsSize,
MUST_BE_TRUE(scheduleInstSize == bbInstsSize,
"Size of inst list is different before/after scheduling");
}
bool Node::isTransitiveDep(Node* edgeDst)
......@@ -958,7 +978,7 @@ DDD::DDD(Mem_Manager &m, G4_BB* bb, const Options *options,
{
Node* lastBarrier = NULL;
totalGRFNum = m_options->getuInt32Option(vISA_TotalGRFNum);
HWthreadsPerEU = kernel->fg.builder->getNumThreadPerEU();
HWthreadsPerEU = m_options->getuInt32Option(vISA_HWThreadNumberPerEU);
useMTLatencies = m_options->getOption(vISA_useMultiThreadedLatencies);
bool BTIIsRestrict = m_options->getOption(vISA_ReorderDPSendToDifferentBti);
......
ifeq ($(UFO_IGC),y)
INTERNAL_UFO_NDK=y
endif # UFO_IGC==y
# Copyright (2014) Intel Corporation All Rights Reserved.
#
# The source code, information and material ("Material") contained
# herein is owned by Intel Corporation or its suppliers or licensors,
# and title to such Material remains with Intel Corporation or its
# suppliers or licensors. The Material contains proprietary information
# of Intel or its suppliers and licensors. The Material is protected by
# worldwide copyright laws and treaty provisions. No part of the
# Material may be used, copied, reproduced, modified, published,
# uploaded, posted, transmitted, distributed or disclosed in any way
# without Intel's prior express written permission. No license under any
# patent, copyright or other intellectual property rights in the
# Material is granted to or conferred upon you, either expressly, by
# implication, inducement, estoppel or otherwise. Any license under such
# intellectual property rights must be express and approved by Intel in
# writing.
#
# Unless otherwise agreed by Intel in writing, you may not remove or alter
# this notice or any other notice embedded in Materials by Intel or Intel's
# suppliers or licensors in any way.
LOCAL_C_INCLUDES += \
$(GFX_DEVELOPMENT_DIR)/Source/visa/include
LOCAL_SHARED_LIBRARIES += \
libc \
libhardware \
liblog
LOCAL_CFLAGS += -DIGC_EXPORTS
......@@ -138,6 +138,7 @@ static uint32_t buildDescForScatter(uint32_t msgType, Common_ISA_SVM_Block_Num n
{
uint32_t MD = (msgType & 0x1F) << 14;
MD |= numBlocks << 10;
MD |= 1 << 9;
MD |= simdMode << 8;
return MD;
}
......
......@@ -34,6 +34,13 @@ typedef struct _CM_PROFILE_INFO {
int value;
} CM_PROFILE_INFO;
typedef struct _CM_BB_INFO {
int id;
unsigned staticCycle;
unsigned sendStallCycle;
unsigned char loopNestLevel;
} CM_BB_INFO;
typedef struct _CM_JIT_INFO {
// Common part
bool isSpill;
......@@ -57,9 +64,8 @@ typedef struct _CM_JIT_INFO {
// whether kernel uses a barrier
bool usesBarrier;
// (very) rough estimate of single thread execution/stall cycles
unsigned staticCycle;
unsigned sendStallCycle;
unsigned BBNum;
CM_BB_INFO *BBInfo;
// number of spill/fill, weighted by loop
unsigned int numGRFSpillFill;
......
......@@ -142,6 +142,7 @@ DEF_VISA_OPTION(vISA_WAWSubregHazardAvoidance, ET_BOOL, "-noWAWSubregHazardAv
DEF_VISA_OPTION(vISA_useMultiThreadedLatencies, ET_BOOL, "-dontUseMultiThreadedLatencies", UNUSED, true)
DEF_VISA_OPTION(vISA_SchedulerWindowSize, ET_INT32, "-schedulerwindow", "USAGE: -schedulerwindow <window-size>\n", 4096)
DEF_VISA_OPTION(vISA_UnifiedSendCycle, ET_INT32, "-unifiedSendCycle", "USAGE: -unifiedSendCycle <cycle>\n", 0)
DEF_VISA_OPTION(vISA_HWThreadNumberPerEU, ET_INT32, "-HWThreadNumberPerEU", "USAGE: -HWThreadNumberPerEU <num>\n", 7)
DEF_VISA_OPTION(vISA_NoAtomicSend, ET_BOOL, "-noAtomicSend", UNUSED, false)
......
......@@ -620,18 +620,4 @@ typedef struct _vISA_RT_CONTROLS
unsigned isHeaderMaskfromCe0 : 1;
} vISA_RT_CONTROLS;
enum class GenPrecision : unsigned char
{
INVALID,
U1,
U2,
U4,
U8,
S1,
S2,
S4,
S8
};
#endif
SolutionDir := $(LOCAL_PATH)/
ifeq ($(UFO_IGC),y)
INTERNAL_UFO_NDK=y
endif # UFO_IGC==y
# Copyright (2014) Intel Corporation All Rights Reserved.
#
# The source code, information and material ("Material") contained
# herein is owned by Intel Corporation or its suppliers or licensors,
# and title to such Material remains with Intel Corporation or its
# suppliers or licensors. The Material contains proprietary information
# of Intel or its suppliers and licensors. The Material is protected by
# worldwide copyright laws and treaty provisions. No part of the
# Material may be used, copied, reproduced, modified, published,
# uploaded, posted, transmitted, distributed or disclosed in any way
# without Intel's prior express written permission. No license under any
# patent, copyright or other intellectual property rights in the
# Material is granted to or conferred upon you, either expressly, by
# implication, inducement, estoppel or otherwise. Any license under such
# intellectual property rights must be express and approved by Intel in
# writing.
#
# Unless otherwise agreed by Intel in writing, you may not remove or alter
# this notice or any other notice embedded in Materials by Intel or Intel's
# suppliers or licensors in any way.
LOCAL_C_INCLUDES += \
$(GFX_DEVELOPMENT_DIR)/Source/visa/include
LOCAL_SHARED_LIBRARIES += \
libc \
libhardware \
liblog
LOCAL_CFLAGS += -DIGC_EXPORTS
.*\$\(OutDir\)CISA\.tab\.c
.*\$\(OutDir\)lex\.CISA\.c
%(RootDir)%(Directory):=!delete!
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