1. 22 Dec, 2018 2 commits
  2. 16 Dec, 2018 1 commit
  3. 11 Dec, 2018 1 commit
  4. 07 Dec, 2018 1 commit
  5. 06 Dec, 2018 1 commit
  6. 19 Oct, 2018 1 commit
  7. 21 Aug, 2018 1 commit
    • paigeale's avatar
      The following function will now be available in OCL with using the · ca39f47a
      paigeale authored
      build option (cl_intel_64bit_global_atomics_placeholder)...
      A32/A64 with 64bit values:
      atomic_add
      atomic_sub
      atomic_xchg
      atomic_min
      atomic_max
      atomic_inc
      atomic_dec
      atomic_and
      atomic_or
      atomic_xor
      atomic_cmpxchg
      
      Change-Id: I44e029f735b3de768bcf584f4fe987e6bdbb2cab
      ca39f47a
  8. 20 Aug, 2018 1 commit
  9. 26 Jul, 2018 1 commit
  10. 12 Jul, 2018 1 commit
  11. 15 Jun, 2018 1 commit
  12. 11 Jun, 2018 1 commit
  13. 05 Jun, 2018 2 commits
  14. 29 May, 2018 1 commit
  15. 24 May, 2018 1 commit
  16. 16 May, 2018 1 commit
  17. 14 May, 2018 1 commit
  18. 11 May, 2018 1 commit
    • lfilipko's avatar
      IGC/LLVM Incremental build: unifying LLVM usage across different platforms. · 518e60ca
      lfilipko authored
      Although on all platforms LLVM is built from sources, it is not built the same way.
      This change limits LLVM build/usage to only two options:
      1) LLVM cmake files are directly embedded into interested parties CMakefile.txt files
      2) LLVM is precompiled prior to IGC compilation - IGC uses LLVM prebuilt
      Also the following has been implemented:
      1) llvm-install target has been removed. All modules depending on it have been adjusted to use
      proper set of LLVM headers and libraries.
      2) new LLVM prebuilt option has been added. The user have an option to either locally build LLVM
      from sources or use already compiled LLVM (stored in fixed location).
      
      Change-Id: I6987784eb905d430c127c78a9f54e083e2f86cf5
      518e60ca
  19. 26 Apr, 2018 1 commit
    • paigeale's avatar
      Made changes to how we create and consume OCL builtins by putting them in an... · 1f53c8f2
      paigeale authored
      Made changes to how we create and consume OCL builtins by putting them in an elf file. Also removed the work around for correctly rounded sqrt and added a flag for it in the builtins.
      
      This is essentially a re-checkin of Ife811c6561def33795c02886351750e129d9dc65
      
      Change-Id: I863b08fc06b07def4431a1632facc847832e138d
      1f53c8f2
  20. 25 Apr, 2018 1 commit
  21. 24 Apr, 2018 1 commit
  22. 28 Mar, 2018 1 commit
  23. 22 Mar, 2018 1 commit
  24. 21 Mar, 2018 1 commit
  25. 20 Mar, 2018 1 commit
    • pguo's avatar
      Changes in code. · e36ddea0
      pguo authored
      Change-Id: I512291b4d6160ae4a92157e8fe638e562b9b6591
      e36ddea0
  26. 16 Mar, 2018 1 commit
    • pjurek's avatar
      Changes in code. · f7a350a6
      pjurek authored
      Change-Id: I2cf7bd771007ffa80db99ca67166d4929b4ca9b6
      f7a350a6
  27. 09 Mar, 2018 1 commit
    • rishipal's avatar
      Commit contains 30 changes. · 479b29e5
      rishipal authored
      Change 1:
          Adding a regkey LimitConstantBuffersPushed to enable/disable limiting the number of constant buffers
        made by: Rishipal S Bhatia
      
      Change 2:
          Added a new pattern to the MatchRegisterRegion. In this case we are matching Shuffle(shr(laneid, const)).
        made by: Juan1 Rodriguez
      
      Change 3:
          Updated the cmake file
        made by: Pankaj Mistry
      
      Change 4:
          This is the IGC part of fix for issue described in: https://github.com/intel/compute-runtime/issues/21
        made by: Pawel Jurek
      
      Change 5:
          Added a new pattern to the MatchRegisterRegion. In this case we are matching Shuffle(shr(laneid, const)).
        made by:  hudson_server
      
      Change 6:
          N/A
        made by: Manohara Kariganur
      
      Change 7:
      
        made by: Thomas F Raoux
      
      Change 8:
          N/A
        made by: Manohara Kariganur
      
      Change 9:
          Fixing a couple of leaks reported by:
        made by: Juan1 Rodriguez
      
      Change 10:
          N/A
        made by: Manohara Kariganur
      
      Change 11:
          This CL refactors IGC code to read maxWorkGroupSize inforamtion from the metadata for compute shaders and choose the appropriate simd mode.
        made by: Rishipal S Bhatia
      
      Change 12:
          Added a new pattern to the MatchRegisterRegion. In this case we are matching Shuffle(shr(laneid, const)).
        made by: Juan1 Rodriguez
      
      Change 13:
          The previous perf regression was due to BB layout
        made by: Junjie Gu
      
      Change 14:
          Hoist loop invariant multiplies outside of loop, fp unsafe optimization.
        made by: Peng Guo
      
      Change 15:
          Michael Liao investigated performance regression in basemark_julia and found that the issue is related to Clang upgrade. The issue was related to vec3 handling and was fixed in Clang by adding optional -fpreserve-vec3-type option. It was added to our runtime, but wasn't added to CmakeLists responsible for built-in generation.
        made by: Pawel Jurek
      
      Change 16:
          Changed the way of moving from temporary directory of libraries to the destination. Instead of copying cmake will now make symlinks.
        made by: Lukasz Wesierski
      
      Change 17:
          BDW platform does not support write to cube texture through HDC.
          This workaround consists of the following parts:
          1. Adds new field called cubeTo2DArrayWATable to compute compiler output - indices correspond with location indices of textures.
          2. Analyses the shader inputs and if it finds cube texture with write or read/write access qualifier, it changes appropriate element in the array cubeTo2DArrayWATable in compute compiler output.
          3. Adds flag responsible for switching between old and new workaround, It gives the testing possibility to someone who will be responsible for driver implementation.  If driver changes will be done, I'm planning to remove this flag and make code clearer - at this moment old WA is enabled, the new one will be enabled if driver changes will be done.
        made by: Andrzej Ratajewski
      
      Change 18:
          Reduce the time of split checking for interference graph building
        made by: Bu Qi Cheng
      
      Change 19:
          Compile time logging
        made by: Peng Guo
      
      Change 20:
          Back-out of one of previous change.
        made by:  IGC
      
      Change 21:
          Back-out of one of previous change.
        made by:  IGC
      
      Change 22:
          Back-out of one of previous change.
        made by:  IGC
      
      Change 23:
          Spir-V instruction OpCompositeConstruct crashes driver when vector operands are used. Fix is about to extract vector elements before insert them to new composite object.
        made by: Lukasz Gotszald
      
      Change 24:
          HW swapping is only triggerred by the first simd8 in a simd16, but both sources of two simd8 will swapped.
          Inter read suppression is not supported for simd16 instruction
        made by: Bu Qi Cheng
      
      Change 25:
          Apply rule: "elements within a `Width' cannot cross GRF boundaries"
        made by: Bu Qi Cheng
      
      Change 26:
          Fix input payload layouts
        made by: Jose Santillan
      
      Change 27:
          Init tables are already declared in wa_def.h. They are not needed here.
        made by: Anupama Chandrasekhar
      
      Change 28:
          Automated integration from mainline to DEV_IGC
        made by:  IGC
      
      Change 29:
          If two succs are empty BBs, select one based on some rules, rather than return the first succ all the time.
        made by: Junjie Gu
      
      Change 30:
        made by: Xiao Lei
      
      Change-Id: I13ae7da8467fcd9214ef24f07893bd979d06b10b
      479b29e5
  28. 22 Feb, 2018 1 commit
    • Junjie Gu's avatar
      Fixes to CISA.y · 6faf83d1
      Junjie Gu authored
      Change-Id: Ic5ba97b2d4ad21dcdd04b8c6bfd1862221d4eaf1
      6faf83d1
  29. 30 Jan, 2018 1 commit