Commit 408f329c authored by Sylvestre Ledru's avatar Sylvestre Ledru

Cherry-pick various fixes for julia

parent c13ed54e
......@@ -2,8 +2,10 @@ llvm-toolchain-6.0 (1:6.0.1-11) unstable; urgency=medium
* Remove 'Multi-Arch: same' in libclang
(Closes: #874248)
* Cherry-pick various llvm fixes for Julia
(Closes: #919628)
-- Sylvestre Ledru <sylvestre@debian.org> Thu, 24 Jan 2019 08:44:24 +0100
-- Sylvestre Ledru <sylvestre@debian.org> Sat, 09 Feb 2019 17:22:59 +0100
llvm-toolchain-6.0 (1:6.0.1-10) unstable; urgency=medium
......
From 6e7b660ee185445640110c80d80aafd436682fca Mon Sep 17 00:00:00 2001
From: Yichao Yu <yyc1992@gmail.com>
Date: Fri, 9 Dec 2016 15:59:46 -0500
Subject: [PATCH] Fix unwind info relocation with large code model on AArch64
---
lib/MC/MCObjectFileInfo.cpp | 2 ++
.../AArch64/ELF_ARM64_BE-large-relocations.s | 18 ++++++++++++++++++
.../RuntimeDyld/AArch64/ELF_ARM64_large-relocations.s | 18 ++++++++++++++++++
3 files changed, 38 insertions(+)
create mode 100644 test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_BE-large-relocations.s
create mode 100644 test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_large-relocations.s
Index: llvm-toolchain-6.0-6.0.1/lib/MC/MCObjectFileInfo.cpp
===================================================================
--- llvm-toolchain-6.0-6.0.1.orig/lib/MC/MCObjectFileInfo.cpp
+++ llvm-toolchain-6.0-6.0.1/lib/MC/MCObjectFileInfo.cpp
@@ -328,6 +328,8 @@ void MCObjectFileInfo::initELFMCObjectFi
dwarf::DW_EH_PE_sdata4
: dwarf::DW_EH_PE_absptr;
break;
+ case Triple::aarch64:
+ case Triple::aarch64_be:
case Triple::x86_64:
if (PositionIndependent) {
PersonalityEncoding =
Index: llvm-toolchain-6.0-6.0.1/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_BE-large-relocations.s
===================================================================
--- /dev/null
+++ llvm-toolchain-6.0-6.0.1/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_BE-large-relocations.s
@@ -0,0 +1,18 @@
+# RUN: llvm-mc -triple=aarch64_be-none-linux-gnu -code-model=large -filetype=obj -o %T/be-large-reloc.o %s
+# RUN: llvm-rtdyld -triple=aarch64_be-none-linux-gnu -verify -map-section be-large-reloc.o,.eh_frame=0x10000 -map-section be-large-reloc.o,.text=0xffff000000000000 -check=%s %T/be-large-reloc.o
+
+ .text
+ .globl g
+ .p2align 2
+ .type g,@function
+g:
+ .cfi_startproc
+ mov x0, xzr
+ ret
+ .Lfunc_end0:
+ .size g, .Lfunc_end0-g
+ .cfi_endproc
+
+# Skip the CIE and load the 8 bytes PC begin pointer.
+# Assuming the CIE and the FDE length are both 4 bytes.
+# rtdyld-check: *{8}(section_addr(be-large-reloc.o, .eh_frame) + (*{4}(section_addr(be-large-reloc.o, .eh_frame))) + 0xc) = g - (section_addr(be-large-reloc.o, .eh_frame) + (*{4}(section_addr(be-large-reloc.o, .eh_frame))) + 0xc)
Index: llvm-toolchain-6.0-6.0.1/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_large-relocations.s
===================================================================
--- /dev/null
+++ llvm-toolchain-6.0-6.0.1/test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_large-relocations.s
@@ -0,0 +1,18 @@
+# RUN: llvm-mc -triple=arm64-none-linux-gnu -code-model=large -filetype=obj -o %T/large-reloc.o %s
+# RUN: llvm-rtdyld -triple=arm64-none-linux-gnu -verify -map-section large-reloc.o,.eh_frame=0x10000 -map-section large-reloc.o,.text=0xffff000000000000 -check=%s %T/large-reloc.o
+
+ .text
+ .globl g
+ .p2align 2
+ .type g,@function
+g:
+ .cfi_startproc
+ mov x0, xzr
+ ret
+ .Lfunc_end0:
+ .size g, .Lfunc_end0-g
+ .cfi_endproc
+
+# Skip the CIE and load the 8 bytes PC begin pointer.
+# Assuming the CIE and the FDE length are both 4 bytes.
+# rtdyld-check: *{8}(section_addr(large-reloc.o, .eh_frame) + (*{4}(section_addr(large-reloc.o, .eh_frame))) + 0xc) = g - (section_addr(large-reloc.o, .eh_frame) + (*{4}(section_addr(large-reloc.o, .eh_frame))) + 0xc)
From f76abe65e6d07fea5e838c4f8c9a9421c16debb0 Mon Sep 17 00:00:00 2001
From: Valentin Churavy <v.churavy@gmail.com>
Date: Thu, 5 Jul 2018 12:37:50 -0400
Subject: [PATCH] Fix unwind info relocation with large code model on AArch64
---
lib/MC/MCObjectFileInfo.cpp | 2 ++
.../AArch64/ELF_ARM64_large-relocations.s | 20 +++++++++++++++++++
2 files changed, 22 insertions(+)
create mode 100644 test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_large-relocations.s
Index: llvm-toolchain-6.0-6.0.1/lib/MC/MCObjectFileInfo.cpp
===================================================================
--- llvm-toolchain-6.0-6.0.1.orig/lib/MC/MCObjectFileInfo.cpp
+++ llvm-toolchain-6.0-6.0.1/lib/MC/MCObjectFileInfo.cpp
@@ -291,6 +291,8 @@ void MCObjectFileInfo::initELFMCObjectFi
break;
case Triple::ppc64:
case Triple::ppc64le:
+ case Triple::aarch64:
+ case Triple::aarch64_be:
case Triple::x86_64:
FDECFIEncoding = dwarf::DW_EH_PE_pcrel |
(Large ? dwarf::DW_EH_PE_sdata8 : dwarf::DW_EH_PE_sdata4);
From f94d12b6108b944199b715f31f25a022f75d2feb Mon Sep 17 00:00:00 2001
From: Yichao Yu <yyc1992@gmail.com>
Date: Sat, 10 Jun 2017 08:45:13 -0400
Subject: [PATCH 4/4] Enable support for floating-point division reductions
Similar to fsub, fdiv can also be vectorized using fmul.
---
lib/Transforms/Utils/LoopUtils.cpp | 1 +
test/Transforms/LoopVectorize/float-reduction.ll | 22 ++++++++++++++++++++++
2 files changed, 23 insertions(+)
Index: llvm-toolchain-6.0-6.0.1/lib/Transforms/Utils/LoopUtils.cpp
===================================================================
--- llvm-toolchain-6.0-6.0.1.orig/lib/Transforms/Utils/LoopUtils.cpp
+++ llvm-toolchain-6.0-6.0.1/lib/Transforms/Utils/LoopUtils.cpp
@@ -513,6 +513,7 @@ RecurrenceDescriptor::isRecurrenceInstr(
return InstDesc(Kind == RK_IntegerOr, I);
case Instruction::Xor:
return InstDesc(Kind == RK_IntegerXor, I);
+ case Instruction::FDiv:
case Instruction::FMul:
return InstDesc(Kind == RK_FloatMult, I, UAI);
case Instruction::FSub:
Index: llvm-toolchain-6.0-6.0.1/test/Transforms/LoopVectorize/float-reduction.ll
===================================================================
--- llvm-toolchain-6.0-6.0.1.orig/test/Transforms/LoopVectorize/float-reduction.ll
+++ llvm-toolchain-6.0-6.0.1/test/Transforms/LoopVectorize/float-reduction.ll
@@ -44,3 +44,25 @@ for.body:
for.end: ; preds = %for.body
ret float %sub
}
+
+;CHECK-LABEL: @foodiv(
+;CHECK: fdiv fast <4 x float>
+;CHECK: ret
+define float @foodiv(float* nocapture %A, i32* nocapture %n) nounwind uwtable readonly ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
+ %sum.04 = phi float [ 1.000000e+00, %entry ], [ %sub, %for.body ]
+ %arrayidx = getelementptr inbounds float, float* %A, i64 %indvars.iv
+ %0 = load float, float* %arrayidx, align 4
+ %sub = fdiv fast float %sum.04, %0
+ %indvars.iv.next = add i64 %indvars.iv, 1
+ %lftr.wideiv = trunc i64 %indvars.iv.next to i32
+ %exitcond = icmp eq i32 %lftr.wideiv, 200
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret float %sub
+}
commit 6a311a7a804831fea43cfb2f61322adcb407a1af
Author: Keno Fischer <keno@juliacomputing.com>
Date: Thu Jan 18 15:57:05 2018 -0500
[JumpThreading] Don't restrict cast-traversal to i1
Summary:
In D17663, JumpThreading learned to look trough simple cast instructions,
but only if the source of those cast instructions was a phi/cmp i1
(in an effort to limit compile time effects). I think this condition
is too restrictive. For switches with limited value range, InstCombine
will readily introduce an extra `trunc` instruction to a smaller
integer type (e.g. from i8 to i2), leaving us in the somewhat perverse
situation that jump-threading would work before running instcombine,
but not after. Since instcombine produces this pattern, I think we
need to consider it canonical and support it in JumpThreading.
In general, for limiting recursion, I think the existing restriction
to phi and cmp nodes should be sufficient to avoid looking through
unprofitable chains of instructions.
Reviewers: haicheng, gberry, bmakam, mcrosier
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42262
Index: llvm-toolchain-6.0-6.0.1/lib/Transforms/Scalar/JumpThreading.cpp
===================================================================
--- llvm-toolchain-6.0-6.0.1.orig/lib/Transforms/Scalar/JumpThreading.cpp
+++ llvm-toolchain-6.0-6.0.1/lib/Transforms/Scalar/JumpThreading.cpp
@@ -656,11 +656,9 @@ bool JumpThreadingPass::ComputeValueKnow
}
// Handle Cast instructions. Only see through Cast when the source operand is
- // PHI or Cmp and the source type is i1 to save the compilation time.
+ // PHI or Cmp to save the compilation time.
if (CastInst *CI = dyn_cast<CastInst>(I)) {
Value *Source = CI->getOperand(0);
- if (!Source->getType()->isIntegerTy(1))
- return false;
if (!isa<PHINode>(Source) && !isa<CmpInst>(Source))
return false;
ComputeValueKnownInPredecessors(Source, BB, Result, Preference, CxtI);
Index: llvm-toolchain-6.0-6.0.1/test/Transforms/JumpThreading/basic.ll
===================================================================
--- llvm-toolchain-6.0-6.0.1.orig/test/Transforms/JumpThreading/basic.ll
+++ llvm-toolchain-6.0-6.0.1/test/Transforms/JumpThreading/basic.ll
@@ -547,6 +547,34 @@ l5:
; CHECK: }
}
+define i1 @trunc_switch(i1 %arg) {
+; CHECK-LABEL: @trunc_switch
+top:
+; CHECK: br i1 %arg, label %exitA, label %exitB
+ br i1 %arg, label %common, label %B
+
+B:
+ br label %common
+
+common:
+ %phi = phi i8 [ 2, %B ], [ 1, %top ]
+ %trunc = trunc i8 %phi to i2
+; CHECK-NOT: switch
+ switch i2 %trunc, label %unreach [
+ i2 1, label %exitA
+ i2 -2, label %exitB
+ ]
+
+unreach:
+ unreachable
+
+exitA:
+ ret i1 true
+
+exitB:
+ ret i1 false
+}
+
; CHECK-LABEL: define void @h_con(i32 %p) {
define void @h_con(i32 %p) {
%x = icmp ult i32 %p, 5
This diff is collapsed.
commit 8eb2b102a203d83fb713f3bf79acf235dabdd8cd
Author: Keno Fischer <keno@juliacomputing.com>
Date: Mon Jul 30 16:59:08 2018 -0400
[VNCoercion] Disallow coercion between different ni addrspaces
Summary:
I'm not sure if it would be legal by the IR reference to introduce
an addrspacecast here, since the IR reference is a bit vague on
the exact semantics, but at least for our usage of it (and I
suspect for many other's usage) it is not. For us, addrspacecasts
between non-integral address spaces carry frontend information that the
optimizer cannot deduce afterwards in a generic way (though we
have frontend specific passes in our pipline that do propagate
these). In any case, I'm sure nobody is using it this way at
the moment, since it would have introduced inttoptrs, which
are definitely illegal.
Fixes PR38375
Reviewers: sanjoy, reames, dberlin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D50010
diff --git a/lib/Transforms/Utils/VNCoercion.cpp b/lib/Transforms/Utils/VNCoercion.cpp
index c3feea6a0a4..735d1e7b792 100644
--- a/lib/Transforms/Utils/VNCoercion.cpp
+++ b/lib/Transforms/Utils/VNCoercion.cpp
@@ -20,14 +20,21 @@ bool canCoerceMustAliasedValueToLoad(Value *StoredVal, Type *LoadTy,
StoredVal->getType()->isStructTy() || StoredVal->getType()->isArrayTy())
return false;
+ Type *StoredValTy = StoredVal->getType();
+
// The store has to be at least as big as the load.
if (DL.getTypeSizeInBits(StoredVal->getType()) < DL.getTypeSizeInBits(LoadTy))
return false;
- // Don't coerce non-integral pointers to integers or vice versa.
- if (DL.isNonIntegralPointerType(StoredVal->getType()) !=
- DL.isNonIntegralPointerType(LoadTy))
+ bool StoredNI = DL.isNonIntegralPointerType(StoredValTy);
+ bool LoadNI = DL.isNonIntegralPointerType(LoadTy);
+ if (StoredNI != LoadNI) {
return false;
+ } else if (StoredNI && LoadNI &&
+ cast<PointerType>(StoredValTy)->getAddressSpace() !=
+ cast<PointerType>(LoadTy)->getAddressSpace()) {
+ return false;
+ }
return true;
}
diff --git a/test/Transforms/GVN/non-integral-pointers.ll b/test/Transforms/GVN/non-integral-pointers.ll
index 9ae4132231d..5217fc1a06a 100644
--- a/test/Transforms/GVN/non-integral-pointers.ll
+++ b/test/Transforms/GVN/non-integral-pointers.ll
@@ -1,6 +1,6 @@
; RUN: opt -gvn -S < %s | FileCheck %s
-target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:4"
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:4:5"
target triple = "x86_64-unknown-linux-gnu"
define void @f0(i1 %alwaysFalse, i64 %val, i64* %loc) {
@@ -37,3 +37,21 @@ define i64 @f1(i1 %alwaysFalse, i8 addrspace(4)* %val, i8 addrspace(4)** %loc) {
alwaysTaken:
ret i64 42
}
+
+ define i8 addrspace(5)* @multini(i1 %alwaysFalse, i8 addrspace(4)* %val, i8 addrspace(4)** %loc) {
+ ; CHECK-LABEL: @multini(
+ ; CHECK-NOT: inttoptr
+ ; CHECK-NOT: ptrtoint
+ ; CHECK-NOT: addrspacecast
+ entry:
+ store i8 addrspace(4)* %val, i8 addrspace(4)** %loc
+ br i1 %alwaysFalse, label %neverTaken, label %alwaysTaken
+
+ neverTaken:
+ %loc.bc = bitcast i8 addrspace(4)** %loc to i8 addrspace(5)**
+ %differentas = load i8 addrspace(5)*, i8 addrspace(5)** %loc.bc
+ ret i8 addrspace(5)* %differentas
+
+ alwaysTaken:
+ ret i8 addrspace(5)* null
+ }
This diff is collapsed.
From 15899eaab58e96bb7bbe7a14099674e255656a50 Mon Sep 17 00:00:00 2001
From: Valentin Churavy <v.churavy@gmail.com>
Date: Fri, 23 Feb 2018 14:41:20 -0500
Subject: [PATCH] Make AddrSpaceCast noops on PPC
PPC as AArch64 doesn't have address-spaces so we can drop them in the backend
---
lib/Target/PowerPC/PPCISelLowering.h | 5 +++++
1 file changed, 5 insertions(+)
Index: llvm-toolchain-6.0-6.0.1/lib/Target/PowerPC/PPCISelLowering.h
===================================================================
--- llvm-toolchain-6.0-6.0.1.orig/lib/Target/PowerPC/PPCISelLowering.h
+++ llvm-toolchain-6.0-6.0.1/lib/Target/PowerPC/PPCISelLowering.h
@@ -889,6 +889,11 @@ namespace llvm {
return true;
}
+ bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override {
+ // Addrspacecasts are always noops.
+ return true;
+ }
+
bool canReuseLoadAddress(SDValue Op, EVT MemVT, ReuseLoadInfo &RLI,
SelectionDAG &DAG,
ISD::LoadExtType ET = ISD::NON_EXTLOAD) const;
This diff is collapsed.
This diff is collapsed.
......@@ -73,3 +73,29 @@ hurd-lib_Support_Unix_Path.inc.diff
hurd-tools_llvm-shlib_CMakeLists.txt.diff
D53557-hurd-self-exe-realpath.diff
clang-arm-default-vfp3-on-armv7a.patch
# Julia compa (to avoid yet-a-new-fork-of-llvm)
# See bug 919628
# (1) [unwind] llvm-D27629-AArch64-large_model_6.0.1
julia/llvm-D27629-AArch64-large_model_4.0.patch
julia/llvm-D27629-AArch64-large_model_6.0.1.patch
# (2) [performance] llvm-D34078-vectorize-fdiv
julia/llvm-D34078-vectorize-fdiv.patch
# (4) [performance regression] llvm-D42262-jumpthreading-not-i1
julia/llvm-D42262-jumpthreading-not-i1.patch
# (14) llvm-D50167-scev-umin
julia/llvm-D50167-scev-umin.patch
# (13) llvm-D50010-VNCoercion-ni
julia/llvm-D50010-VNCoercion-ni.patch
# (5) [???] llvm-PPC-addrspaces
julia/llvm-PPC-addrspaces.patch
# (15) llvm-rL326967-aligned-load
julia/llvm-rL326967-aligned-load.patch
# (8) [???] llvm-rL327898
julia/llvm-rL327898.patch
# (11) [profiling] llvm-D44892-Perf-integration
julia/llvm-D44892-Perf-integration.patch
# (12) [bug fix] llvm-D49832-SCEVPred
# [bug fix] llvm-rL323946-LSRTy
# Already applied before
\ No newline at end of file
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