debian/changelog

+llvm-toolchain-6.0 (1:6.0.1-5) unstable; urgency=medium
+
+  * Cherry-pick a patch from 7 to fix an issue with Julia
+    on powerpc - PowerPC-Make-AddrSpaceCast-noop.diff
+    (Closes: #906314)
+
+ -- Sylvestre Ledru <sylvestre@debian.org>  Fri, 17 Aug 2018 08:49:22 +0200
+
+llvm-toolchain-6.0 (1:6.0.1-4) unstable; urgency=medium
+
+  * Disable force-gcc-header-obj.diff as it is introducing
+    some regressions in the search headers
+    (Closes: #903709)
+  * Standards-Version: 4.2.0
+
+ -- Sylvestre Ledru <sylvestre@debian.org>  Wed, 15 Aug 2018 15:25:42 +0200
+
+llvm-toolchain-6.0 (1:6.0.1-3) unstable; urgency=medium
+
+  * Backport to fix a miscompilation issue with rust.
+    See https://github.com/rust-lang/rust/issues/52694
+    and https://github.com/rust-lang/llvm/pull/106
+
+  [ Dimitri John Ledkov ]
+  * Enable lldb on ppc64el LP: #1777136
+
+  [ Lumin ]
+  * backport two upstream patches to fix julia miscompiling (Closes: #905397)
+    llvm-D49832-SCEVPred.patch, llvm-rL323946-LSRTy.patch
+
+  [ Gianfranco Costamagna ]
+  * Team Upload to unstable
+
+ -- Gianfranco Costamagna <locutusofborg@debian.org>  Thu, 09 Aug 2018 10:06:11 +0200
+
 llvm-toolchain-6.0 (1:6.0.1-2) unstable; urgency=medium
 
   * Bump std-version to 4.1.4, no changes required.

debian/control

@@ -16,7 +16,7 @@ Build-Depends: debhelper (>= 9.0), flex, bison, dejagnu, tcl, expect,
 #    libctypes-ocaml-dev [amd64 arm64 armel armhf i386 ppc64el s390x],
 #    dh-ocaml [amd64 arm64 armel armhf i386 ppc64el s390x],
 Build-Conflicts: oprofile, ocaml, libllvm-3.8-ocaml-dev, libllvm-3.9-ocaml-dev
-Standards-Version: 4.1.4
+Standards-Version: 4.2.0
 Homepage: https://www.llvm.org/
 Vcs-Git: https://salsa.debian.org/pkg-llvm-team/llvm-toolchain.git -b 6.0
 Vcs-Browser: https://salsa.debian.org/pkg-llvm-team/llvm-toolchain/tree/6.0
@@ -417,8 +417,8 @@ Description: LLVM-based linker, header files
 # ------------- lldb -------------
 
 Package: lldb-6.0
-Architecture: amd64 armel armhf i386 kfreebsd-amd64 kfreebsd-i386 s390 sparc hppa m68k sh4 x32 mips mipsel arm64
-# ia64 mips mipsel hurd powerpc powerpcspe ppc64 ppc64el alpha s390x sparc64 have been removed
+Architecture: amd64 armel armhf i386 kfreebsd-amd64 kfreebsd-i386 s390 sparc hppa m68k sh4 x32 mips mipsel arm64 ppc64el
+# ia64 mips mipsel hurd powerpc powerpcspe ppc64 alpha s390x sparc64 have been removed
 Depends: ${shlibs:Depends}, ${misc:Depends}, libllvm6.0 (= ${binary:Version}), llvm-6.0-dev,
  python-lldb-6.0
 Pre-Depends: ${misc:Pre-Depends}
@@ -428,8 +428,8 @@ Description: Next generation, high-performance debugger
  Project, such as the Clang expression parser and LLVM disassembler.
 
 Package: liblldb-6.0
-Architecture: amd64 armel armhf i386 kfreebsd-amd64 kfreebsd-i386 s390 sparc hppa m68k sh4 x32 mips mipsel arm64
-# ia64 mips mipsel hurd powerpc powerpcspe ppc64 ppc64el alpha s390x sparc64 have been removed
+Architecture: amd64 armel armhf i386 kfreebsd-amd64 kfreebsd-i386 s390 sparc hppa m68k sh4 x32 mips mipsel arm64 ppc64el
+# ia64 mips mipsel hurd powerpc powerpcspe ppc64 alpha s390x sparc64 have been removed
 Depends: ${shlibs:Depends}, ${misc:Depends}, libllvm6.0 (= ${binary:Version})
 Pre-Depends: ${misc:Pre-Depends}
 Section: libs
@@ -444,8 +444,8 @@ Description: Next generation, high-performance debugger, library
 
 Package: python-lldb-6.0
 Section: python
-Architecture: amd64 armel armhf i386 kfreebsd-amd64 kfreebsd-i386 s390 sparc hppa m68k sh4 x32 mips mipsel arm64
-# ia64 mips mipsel hurd powerpc powerpcspe ppc64 ppc64el alpha s390x sparc64 have been removed
+Architecture: amd64 armel armhf i386 kfreebsd-amd64 kfreebsd-i386 s390 sparc hppa m68k sh4 x32 mips mipsel arm64 ppc64el
+# ia64 mips mipsel hurd powerpc powerpcspe ppc64 alpha s390x sparc64 have been removed
 Depends: ${shlibs:Depends}, ${misc:Depends}, python, python-six
 Conflicts: python-lldb-3.8, python-lldb-3.9, python-lldb-x.y
 Replaces: python-lldb-x.y
@@ -461,8 +461,8 @@ Description: Next generation, high-performance debugger, python lib
 
 Package: liblldb-6.0-dev
 Section: libdevel
-Architecture: amd64 armel armhf i386 kfreebsd-amd64 kfreebsd-i386 s390 sparc hppa m68k sh4 x32 mips mipsel arm64
-# ia64 mips mipsel hurd powerpc powerpcspe ppc64 ppc64el alpha s390x sparc64 have been removed
+Architecture: amd64 armel armhf i386 kfreebsd-amd64 kfreebsd-i386 s390 sparc hppa m68k sh4 x32 mips mipsel arm64 ppc64el
+# ia64 mips mipsel hurd powerpc powerpcspe ppc64 alpha s390x sparc64 have been removed
 Depends: ${shlibs:Depends}, ${misc:Depends}, lldb-6.0 (= ${binary:Version})
 Replaces: lldb-6.0-dev (<= 1:6.0~svn215195-2)
 Breaks: lldb-6.0-dev (<< 1:6.0~svn215195-2)

debian/patches/D42717-JumpThreading-backport-2.diff

+Index: llvm-toolchain-6.0-6.0.1/include/llvm/Analysis/LazyValueInfo.h
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/include/llvm/Analysis/LazyValueInfo.h
++++ llvm-toolchain-6.0-6.0.1/include/llvm/Analysis/LazyValueInfo.h
+@@ -113,6 +113,13 @@ public:
+   /// in LVI, so we need to pass it here as an argument.
+   void printLVI(Function &F, DominatorTree &DTree, raw_ostream &OS);
+ 
++  /// Disables use of the DominatorTree within LVI.
++  void disableDT();
++
++  /// Enables use of the DominatorTree within LVI. Does nothing if the class
++  /// instance was initialized without a DT pointer.
++  void enableDT();
++
+   // For old PM pass. Delete once LazyValueInfoWrapperPass is gone.
+   void releaseMemory();
+ 
+Index: llvm-toolchain-6.0-6.0.1/include/llvm/IR/Dominators.h
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/include/llvm/IR/Dominators.h
++++ llvm-toolchain-6.0-6.0.1/include/llvm/IR/Dominators.h
+@@ -342,6 +342,9 @@ public:
+   /// \brief Returns true if DelBB is awaiting deletion at a flush() event.
+   bool pendingDeletedBB(BasicBlock *DelBB);
+ 
++  /// \brief Returns true if pending DT updates are queued for a flush() event.
++  bool pending();
++
+   /// \brief Flushes all pending updates and block deletions. Returns a
+   /// correct DominatorTree reference to be used by the caller for analysis.
+   DominatorTree &flush();
+Index: llvm-toolchain-6.0-6.0.1/lib/Analysis/LazyValueInfo.cpp
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/Analysis/LazyValueInfo.cpp
++++ llvm-toolchain-6.0-6.0.1/lib/Analysis/LazyValueInfo.cpp
+@@ -401,6 +401,7 @@ namespace {
+     AssumptionCache *AC;  ///< A pointer to the cache of @llvm.assume calls.
+     const DataLayout &DL; ///< A mandatory DataLayout
+     DominatorTree *DT;    ///< An optional DT pointer.
++    DominatorTree *DisabledDT; ///< Stores DT if it's disabled.
+ 
+   ValueLatticeElement getBlockValue(Value *Val, BasicBlock *BB);
+   bool getEdgeValue(Value *V, BasicBlock *F, BasicBlock *T,
+@@ -463,13 +464,30 @@ namespace {
+       TheCache.eraseBlock(BB);
+     }
+ 
++    /// Disables use of the DominatorTree within LVI.
++    void disableDT() {
++      if (DT) {
++        assert(!DisabledDT && "Both DT and DisabledDT are not nullptr!");
++        std::swap(DT, DisabledDT);
++      }
++    }
++
++    /// Enables use of the DominatorTree within LVI. Does nothing if the class
++    /// instance was initialized without a DT pointer.
++    void enableDT() {
++      if (DisabledDT) {
++        assert(!DT && "Both DT and DisabledDT are not nullptr!");
++        std::swap(DT, DisabledDT);
++      }
++    }
++
+     /// This is the update interface to inform the cache that an edge from
+     /// PredBB to OldSucc has been threaded to be from PredBB to NewSucc.
+     void threadEdge(BasicBlock *PredBB,BasicBlock *OldSucc,BasicBlock *NewSucc);
+ 
+     LazyValueInfoImpl(AssumptionCache *AC, const DataLayout &DL,
+                        DominatorTree *DT = nullptr)
+-        : AC(AC), DL(DL), DT(DT) {}
++        : AC(AC), DL(DL), DT(DT), DisabledDT(nullptr) {}
+   };
+ } // end anonymous namespace
+ 
+@@ -1791,6 +1809,16 @@ void LazyValueInfo::printLVI(Function &F
+   }
+ }
+ 
++void LazyValueInfo::disableDT() {
++  if (PImpl)
++    getImpl(PImpl, AC, DL, DT).disableDT();
++}
++
++void LazyValueInfo::enableDT() {
++  if (PImpl)
++    getImpl(PImpl, AC, DL, DT).enableDT();
++}
++
+ // Print the LVI for the function arguments at the start of each basic block.
+ void LazyValueInfoAnnotatedWriter::emitBasicBlockStartAnnot(
+     const BasicBlock *BB, formatted_raw_ostream &OS) {
+Index: llvm-toolchain-6.0-6.0.1/lib/IR/Dominators.cpp
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/IR/Dominators.cpp
++++ llvm-toolchain-6.0-6.0.1/lib/IR/Dominators.cpp
+@@ -453,6 +453,9 @@ bool DeferredDominance::pendingDeletedBB
+   return DeletedBBs.count(DelBB) != 0;
+ }
+ 
++/// \brief Returns true if pending DT updates are queued for a flush() event.
++bool DeferredDominance::pending() { return !PendUpdates.empty(); }
++
+ /// \brief Flushes all pending updates and block deletions. Returns a
+ /// correct DominatorTree reference to be used by the caller for analysis.
+ DominatorTree &DeferredDominance::flush() {
+Index: llvm-toolchain-6.0-6.0.1/lib/Transforms/Scalar/JumpThreading.cpp
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/Transforms/Scalar/JumpThreading.cpp
++++ llvm-toolchain-6.0-6.0.1/lib/Transforms/Scalar/JumpThreading.cpp
+@@ -425,6 +425,7 @@ bool JumpThreadingPass::runImpl(Function
+ 
+   LoopHeaders.clear();
+   DDT->flush();
++  LVI->enableDT();
+   return EverChanged;
+ }
+ 
+@@ -617,6 +618,10 @@ bool JumpThreadingPass::ComputeValueKnow
+     // "X < 4" and "X < 3" is known true but "X < 4" itself is not available.
+     // Perhaps getConstantOnEdge should be smart enough to do this?
+ 
++    if (DDT->pending())
++      LVI->disableDT();
++    else
++      LVI->enableDT();
+     for (BasicBlock *P : predecessors(BB)) {
+       // If the value is known by LazyValueInfo to be a constant in a
+       // predecessor, use that information to try to thread this block.
+@@ -630,6 +635,10 @@ bool JumpThreadingPass::ComputeValueKnow
+ 
+   /// If I is a PHI node, then we know the incoming values for any constants.
+   if (PHINode *PN = dyn_cast<PHINode>(I)) {
++    if (DDT->pending())
++      LVI->disableDT();
++    else
++      LVI->enableDT();
+     for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i) {
+       Value *InVal = PN->getIncomingValue(i);
+       if (Constant *KC = getKnownConstant(InVal, Preference)) {
+@@ -759,6 +768,10 @@ bool JumpThreadingPass::ComputeValueKnow
+       const DataLayout &DL = PN->getModule()->getDataLayout();
+       // We can do this simplification if any comparisons fold to true or false.
+       // See if any do.
++      if (DDT->pending())
++        LVI->disableDT();
++      else
++        LVI->enableDT();
+       for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i) {
+         BasicBlock *PredBB = PN->getIncomingBlock(i);
+         Value *LHS = PN->getIncomingValue(i);
+@@ -792,6 +805,10 @@ bool JumpThreadingPass::ComputeValueKnow
+ 
+       if (!isa<Instruction>(CmpLHS) ||
+           cast<Instruction>(CmpLHS)->getParent() != BB) {
++        if (DDT->pending())
++          LVI->disableDT();
++        else
++          LVI->enableDT();
+         for (BasicBlock *P : predecessors(BB)) {
+           // If the value is known by LazyValueInfo to be a constant in a
+           // predecessor, use that information to try to thread this block.
+@@ -820,6 +837,10 @@ bool JumpThreadingPass::ComputeValueKnow
+             match(CmpLHS, m_Add(m_Value(AddLHS), m_ConstantInt(AddConst)))) {
+           if (!isa<Instruction>(AddLHS) ||
+               cast<Instruction>(AddLHS)->getParent() != BB) {
++            if (DDT->pending())
++              LVI->disableDT();
++            else
++              LVI->enableDT();
+             for (BasicBlock *P : predecessors(BB)) {
+               // If the value is known by LazyValueInfo to be a ConstantRange in
+               // a predecessor, use that information to try to thread this
+@@ -901,6 +922,10 @@ bool JumpThreadingPass::ComputeValueKnow
+   }
+ 
+   // If all else fails, see if LVI can figure out a constant value for us.
++  if (DDT->pending())
++    LVI->disableDT();
++  else
++    LVI->enableDT();
+   Constant *CI = LVI->getConstant(V, BB, CxtI);
+   if (Constant *KC = getKnownConstant(CI, Preference)) {
+     for (BasicBlock *Pred : predecessors(BB))
+@@ -1102,6 +1127,10 @@ bool JumpThreadingPass::ProcessBlock(Bas
+       // threading is concerned.
+       assert(CondBr->isConditional() && "Threading on unconditional terminator");
+ 
++      if (DDT->pending())
++        LVI->disableDT();
++      else
++        LVI->enableDT();
+       LazyValueInfo::Tristate Ret =
+         LVI->getPredicateAt(CondCmp->getPredicate(), CondCmp->getOperand(0),
+                             CondConst, CondBr);
+@@ -1914,6 +1943,10 @@ bool JumpThreadingPass::ThreadEdge(Basic
+         << ", across block:\n    "
+         << *BB << "\n");
+ 
++  if (DDT->pending())
++    LVI->disableDT();
++  else
++    LVI->enableDT();
+   LVI->threadEdge(PredBB, BB, SuccBB);
+ 
+   // We are going to have to map operands from the original BB block to the new
+@@ -2383,6 +2416,10 @@ bool JumpThreadingPass::TryToUnfoldSelec
+     // Now check if one of the select values would allow us to constant fold the
+     // terminator in BB. We don't do the transform if both sides fold, those
+     // cases will be threaded in any case.
++    if (DDT->pending())
++      LVI->disableDT();
++    else
++      LVI->enableDT();
+     LazyValueInfo::Tristate LHSFolds =
+         LVI->getPredicateOnEdge(CondCmp->getPredicate(), SI->getOperand(1),
+                                 CondRHS, Pred, BB, CondCmp);
+Index: llvm-toolchain-6.0-6.0.1/test/Transforms/JumpThreading/pr36133.ll
+===================================================================
+--- /dev/null
++++ llvm-toolchain-6.0-6.0.1/test/Transforms/JumpThreading/pr36133.ll
+@@ -0,0 +1,44 @@
++; RUN: opt -jump-threading -S < %s | FileCheck %s
++@global = external global i8*, align 8
++
++define i32 @foo(i32 %arg) {
++; CHECK-LABEL: @foo
++; CHECK-LABEL: bb:
++; CHECK: icmp eq
++; CHECK-NEXT: br i1 %tmp1, label %bb7, label %bb7
++bb:
++  %tmp = load i8*, i8** @global, align 8
++  %tmp1 = icmp eq i8* %tmp, null
++  br i1 %tmp1, label %bb3, label %bb2
++
++; CHECK-NOT: bb2:
++bb2:
++  br label %bb3
++
++; CHECK-NOT: bb3:
++bb3:
++  %tmp4 = phi i8 [ 1, %bb2 ], [ 0, %bb ]
++  %tmp5 = icmp eq i8 %tmp4, 0
++  br i1 %tmp5, label %bb7, label %bb6
++
++; CHECK-NOT: bb6:
++bb6:
++  br label %bb7
++
++; CHECK-LABEL: bb7:
++bb7:
++  %tmp8 = icmp eq i32 %arg, -1
++  br i1 %tmp8, label %bb9, label %bb10
++
++; CHECK-LABEL: bb9:
++bb9:
++  ret i32 0
++
++; CHECK-LABEL: bb10:
++bb10:
++  %tmp11 = icmp sgt i32 %arg, -1
++  call void @llvm.assume(i1 %tmp11)
++  ret i32 1
++}
++
++declare void @llvm.assume(i1)

debian/patches/PowerPC-Make-AddrSpaceCast-noop.diff

+Index: llvm-toolchain-6.0-6.0.1/CodeGen/PowerPC/addrspacecast.ll
+===================================================================
+--- /dev/null
++++ llvm-toolchain-6.0-6.0.1/CodeGen/PowerPC/addrspacecast.ll
+@@ -0,0 +1,22 @@
++; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu %s -o - | FileCheck %s
++
++; Check that codegen for an addrspace cast succeeds without error.
++define <4 x i32 addrspace(1)*> @f (<4 x i32*> %x) {
++  %1 = addrspacecast <4 x i32*> %x to <4 x i32 addrspace(1)*>
++  ret <4 x i32 addrspace(1)*> %1
++  ; CHECK-LABEL: @f
++}
++
++; Check that fairly complicated addrspace cast and operations succeed without error.
++%struct = type opaque
++define void @g (%struct addrspace(10)** %x) {
++  %1 = load %struct addrspace(10)*, %struct addrspace(10)** %x
++  %2 = addrspacecast %struct addrspace(10)* %1 to %struct addrspace(11)*
++  %3 = bitcast %struct addrspace(11)* %2 to i8 addrspace(11)*
++  %4 = getelementptr i8, i8 addrspace(11)* %3, i64 16
++  %5 = bitcast i8 addrspace(11)* %4 to %struct addrspace(10)* addrspace(11)*
++  %6 = load %struct addrspace(10)*, %struct addrspace(10)* addrspace(11)* %5
++  store %struct addrspace(10)* %6, %struct addrspace(10)** undef
++  ret void
++  ; CHECK-LABEL: @g
++}
+Index: llvm-toolchain-6.0-6.0.1/lib/Target/PowerPC/PPCISelLowering.h
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/Target/PowerPC/PPCISelLowering.h
++++ llvm-toolchain-6.0-6.0.1/lib/Target/PowerPC/PPCISelLowering.h
+@@ -884,6 +884,11 @@ namespace llvm {
+       }
+     };
+ 
++    bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override {
++      // Addrspacecasts are always noops.
++      return true;
++    }
++
+     bool canReuseLoadAddress(SDValue Op, EVT MemVT, ReuseLoadInfo &RLI,
+                              SelectionDAG &DAG,
+                              ISD::LoadExtType ET = ISD::NON_EXTLOAD) const;

debian/patches/llvm-D49832-SCEVPred.patch

+commit 98592fcc61307968f7df1362771534595a1e1c21
+Author: Keno Fischer <keno@juliacomputing.com>
+Date:   Wed Jul 25 19:29:02 2018 -0400
+
+    [SCEV] Don't expand Wrap predicate using inttoptr in ni addrspaces
+    
+    Summary:
+    In non-integral address spaces, we're not allowed to introduce inttoptr/ptrtoint
+    intrinsics. Instead, we need to expand any pointer arithmetic as geps on the
+    base pointer. Luckily this is a common task for SCEV, so all we have to do here
+    is hook up the corresponding helper function and add test case.
+    
+    Fixes PR38290
+    
+    Reviewers: reames, sanjoy
+    
+    Subscribers: javed.absar, llvm-commits
+    
+    Differential Revision: https://reviews.llvm.org/D49832
+
+diff --git a/lib/Analysis/ScalarEvolutionExpander.cpp b/lib/Analysis/ScalarEvolutionExpander.cpp
+index 7f76f057216..f441a3647fb 100644
+--- a/lib/Analysis/ScalarEvolutionExpander.cpp
++++ b/lib/Analysis/ScalarEvolutionExpander.cpp
+@@ -2154,8 +2154,9 @@ Value *SCEVExpander::generateOverflowCheck(const SCEVAddRecExpr *AR,
+   const SCEV *Step = AR->getStepRecurrence(SE);
+   const SCEV *Start = AR->getStart();
+ 
++  Type *ARTy = AR->getType();
+   unsigned SrcBits = SE.getTypeSizeInBits(ExitCount->getType());
+-  unsigned DstBits = SE.getTypeSizeInBits(AR->getType());
++  unsigned DstBits = SE.getTypeSizeInBits(ARTy);
+ 
+   // The expression {Start,+,Step} has nusw/nssw if
+   //   Step < 0, Start - |Step| * Backedge <= Start
+@@ -2167,11 +2168,12 @@ Value *SCEVExpander::generateOverflowCheck(const SCEVAddRecExpr *AR,
+   Value *TripCountVal = expandCodeFor(ExitCount, CountTy, Loc);
+ 
+   IntegerType *Ty =
+-      IntegerType::get(Loc->getContext(), SE.getTypeSizeInBits(AR->getType()));
++      IntegerType::get(Loc->getContext(), SE.getTypeSizeInBits(ARTy));
++  Type *ARExpandTy = DL.isNonIntegralPointerType(ARTy) ? ARTy : Ty;
+ 
+   Value *StepValue = expandCodeFor(Step, Ty, Loc);
+   Value *NegStepValue = expandCodeFor(SE.getNegativeSCEV(Step), Ty, Loc);
+-  Value *StartValue = expandCodeFor(Start, Ty, Loc);
++  Value *StartValue = expandCodeFor(Start, ARExpandTy, Loc);
+ 
+   ConstantInt *Zero =
+       ConstantInt::get(Loc->getContext(), APInt::getNullValue(DstBits));
+@@ -2194,8 +2196,21 @@ Value *SCEVExpander::generateOverflowCheck(const SCEVAddRecExpr *AR,
+   // Compute:
+   //   Start + |Step| * Backedge < Start
+   //   Start - |Step| * Backedge > Start
+-  Value *Add = Builder.CreateAdd(StartValue, MulV);
+-  Value *Sub = Builder.CreateSub(StartValue, MulV);
++  Value *Add = nullptr, *Sub = nullptr;
++  if (ARExpandTy->isPointerTy()) {
++    PointerType *ARPtrTy = cast<PointerType>(ARExpandTy);
++    const SCEV *MulS = SE.getSCEV(MulV);
++    const SCEV *const StepArray[2] = {MulS, SE.getNegativeSCEV(MulS)};
++    Add = Builder.CreateBitCast(
++        expandAddToGEP(&StepArray[0], &StepArray[1], ARPtrTy, Ty, StartValue),
++        ARPtrTy);
++    Sub = Builder.CreateBitCast(
++        expandAddToGEP(&StepArray[1], &StepArray[2], ARPtrTy, Ty, StartValue),
++        ARPtrTy);
++  } else {
++    Add = Builder.CreateAdd(StartValue, MulV);
++    Sub = Builder.CreateSub(StartValue, MulV);
++  }
+ 
+   Value *EndCompareGT = Builder.CreateICmp(
+       Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT, Sub, StartValue);
+diff --git a/test/Analysis/LoopAccessAnalysis/wrapping-pointer-ni.ll b/test/Analysis/LoopAccessAnalysis/wrapping-pointer-ni.ll
+new file mode 100644
+index 00000000000..ddcf5e1a195
+--- /dev/null
++++ b/test/Analysis/LoopAccessAnalysis/wrapping-pointer-ni.ll
+@@ -0,0 +1,73 @@
++; RUN: opt -loop-versioning -S < %s | FileCheck %s -check-prefix=LV
++
++; NB: addrspaces 10-13 are non-integral
++target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:10:11:12:13"
++
++; This matches the test case from PR38290
++; Check that we expand the SCEV predicate check using GEP, rather
++; than ptrtoint.
++
++%jl_value_t = type opaque
++%jl_array_t = type { i8 addrspace(13)*, i64, i16, i16, i32 }
++
++declare i64 @julia_steprange_last_4949()
++
++define void @"japi1_align!_9477"(%jl_value_t addrspace(10)**) #0 {
++; LV-LAVEL: L26.lver.check
++; LV: [[OFMul:%[^ ]*]]  = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 4, i64 [[Step:%[^ ]*]])
++; LV-NEXT: [[OFMulResult:%[^ ]*]] = extractvalue { i64, i1 } [[OFMul]], 0
++; LV-NEXT: [[OFMulOverflow:%[^ ]*]] = extractvalue { i64, i1 } [[OFMul]], 1
++; LV-NEXT: [[PosGEP:%[^ ]*]] = getelementptr i32, i32 addrspace(13)* [[Base:%[^ ]*]], i64 [[Step]]
++; LV-NEXT: [[NegGEP:%[^ ]*]] = getelementptr i32, i32 addrspace(13)* [[Base]], i64 [[NegStep:%[^ ]*]]
++; LV-NEXT: icmp ugt i32 addrspace(13)* [[NegGEP]], [[Base]]
++; LV-NEXT: icmp ult i32 addrspace(13)* [[PosGEP]], [[Base]]
++; LV-NOT: inttoptr
++; LV-NOT: ptrtoint
++top:
++  %1 = load %jl_value_t addrspace(10)*, %jl_value_t addrspace(10)** %0, align 8, !nonnull !1, !dereferenceable !2, !align !3
++  %2 = load i32, i32* inttoptr (i64 12 to i32*), align 4, !tbaa !4
++  %3 = sub i32 0, %2
++  %4 = call i64 @julia_steprange_last_4949()
++  %5 = addrspacecast %jl_value_t addrspace(10)* %1 to %jl_value_t addrspace(11)*
++  %6 = bitcast %jl_value_t addrspace(11)* %5 to %jl_value_t addrspace(10)* addrspace(11)*
++  %7 = load %jl_value_t addrspace(10)*, %jl_value_t addrspace(10)* addrspace(11)* %6, align 8, !tbaa !4, !nonnull !1, !dereferenceable !9, !align !2
++  %8 = addrspacecast %jl_value_t addrspace(10)* %7 to %jl_value_t addrspace(11)*
++  %9 = bitcast %jl_value_t addrspace(11)* %8 to i32 addrspace(13)* addrspace(11)*
++  %10 = load i32 addrspace(13)*, i32 addrspace(13)* addrspace(11)* %9, align 8, !tbaa !10, !nonnull !1
++  %11 = sext i32 %3 to i64
++  br label %L26
++
++L26:                                              ; preds = %L26, %top
++  %value_phi3 = phi i64 [ 0, %top ], [ %12, %L26 ]
++  %12 = add i64 %value_phi3, -1
++  %13 = getelementptr inbounds i32, i32 addrspace(13)* %10, i64 %12
++  %14 = load i32, i32 addrspace(13)* %13, align 4, !tbaa !13
++  %15 = add i64 %12, %11
++  %16 = getelementptr inbounds i32, i32 addrspace(13)* %10, i64 %15
++  store i32 %14, i32 addrspace(13)* %16, align 4, !tbaa !13
++  %17 = icmp eq i64 %value_phi3, %4
++  br i1 %17, label %L45, label %L26
++
++L45:                                              ; preds = %L26
++  ret void
++}
++
++attributes #0 = { "thunk" }
++
++!llvm.module.flags = !{!0}
++
++!0 = !{i32 1, !"Debug Info Version", i32 3}
++!1 = !{}
++!2 = !{i64 16}
++!3 = !{i64 8}
++!4 = !{!5, !5, i64 0}
++!5 = !{!"jtbaa_mutab", !6, i64 0}
++!6 = !{!"jtbaa_value", !7, i64 0}
++!7 = !{!"jtbaa_data", !8, i64 0}
++!8 = !{!"jtbaa"}
++!9 = !{i64 40}
++!10 = !{!11, !11, i64 0}
++!11 = !{!"jtbaa_arrayptr", !12, i64 0}
++!12 = !{!"jtbaa_array", !8, i64 0}
++!13 = !{!14, !14, i64 0}
++!14 = !{!"jtbaa_arraybuf", !7, i64 0}
+diff --git a/test/Analysis/LoopAccessAnalysis/wrapping-pointer-versioning.ll b/test/Analysis/LoopAccessAnalysis/wrapping-pointer-versioning.ll
+index a7e5bce7445..fa6fccecbf1 100644
+--- a/test/Analysis/LoopAccessAnalysis/wrapping-pointer-versioning.ll
++++ b/test/Analysis/LoopAccessAnalysis/wrapping-pointer-versioning.ll
+@@ -58,10 +58,10 @@ target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
+ ; LV-NEXT: [[OFMul1:%[^ ]*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 4, i64 [[BE]])
+ ; LV-NEXT: [[OFMulResult1:%[^ ]*]] = extractvalue { i64, i1 } [[OFMul1]], 0
+ ; LV-NEXT: [[OFMulOverflow1:%[^ ]*]] = extractvalue { i64, i1 } [[OFMul1]], 1
+-; LV-NEXT: [[AddEnd1:%[^ ]*]] = add i64 %a2, [[OFMulResult1]]
+-; LV-NEXT: [[SubEnd1:%[^ ]*]] = sub i64 %a2, [[OFMulResult1]]
+-; LV-NEXT: [[CmpNeg1:%[^ ]*]] = icmp ugt i64 [[SubEnd1]], %a2
+-; LV-NEXT: [[CmpPos1:%[^ ]*]] = icmp ult i64 [[AddEnd1]], %a2
++; LV-NEXT: [[AddEnd1:%[^ ]*]] = add i64 [[A0:%[^ ]*]], [[OFMulResult1]]
++; LV-NEXT: [[SubEnd1:%[^ ]*]] = sub i64 [[A0]], [[OFMulResult1]]
++; LV-NEXT: [[CmpNeg1:%[^ ]*]] = icmp ugt i64 [[SubEnd1]], [[A0]]
++; LV-NEXT: [[CmpPos1:%[^ ]*]] = icmp ult i64 [[AddEnd1]], [[A0]]
+ ; LV-NEXT: [[Cmp:%[^ ]*]] = select i1 false, i1 [[CmpNeg1]], i1 [[CmpPos1]]
+ ; LV-NEXT: [[PredCheck1:%[^ ]*]] = or i1 [[Cmp]], [[OFMulOverflow1]]
+ 
+@@ -233,10 +233,10 @@ for.end:                                          ; preds = %for.body
+ ; LV: [[OFMul1:%[^ ]*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 4, i64 [[BE:%[^ ]*]])
+ ; LV-NEXT: [[OFMulResult1:%[^ ]*]] = extractvalue { i64, i1 } [[OFMul1]], 0
+ ; LV-NEXT: [[OFMulOverflow1:%[^ ]*]] = extractvalue { i64, i1 } [[OFMul1]], 1
+-; LV-NEXT: [[AddEnd1:%[^ ]*]] = add i64 %a2, [[OFMulResult1]]
+-; LV-NEXT: [[SubEnd1:%[^ ]*]] = sub i64 %a2, [[OFMulResult1]]
+-; LV-NEXT: [[CmpNeg1:%[^ ]*]] = icmp ugt i64 [[SubEnd1]], %a2
+-; LV-NEXT: [[CmpPos1:%[^ ]*]] = icmp ult i64 [[AddEnd1]], %a2
++; LV-NEXT: [[AddEnd1:%[^ ]*]] = add i64 [[A0:%[^ ]*]], [[OFMulResult1]]
++; LV-NEXT: [[SubEnd1:%[^ ]*]] = sub i64 [[A0]], [[OFMulResult1]]
++; LV-NEXT: [[CmpNeg1:%[^ ]*]] = icmp ugt i64 [[SubEnd1]], [[A0]]
++; LV-NEXT: [[CmpPos1:%[^ ]*]] = icmp ult i64 [[AddEnd1]], [[A0]]
+ ; LV-NEXT: [[Cmp:%[^ ]*]] = select i1 false, i1 [[CmpNeg1]], i1 [[CmpPos1]]
+ ; LV-NEXT: [[PredCheck1:%[^ ]*]] = or i1 [[Cmp]], [[OFMulOverflow1]]
+ 

debian/patches/llvm-rL323946-LSRTy.patch

+commit ab60b05a472e8651cbe53c19513b7e62b9ff32df
+Author: Mikael Holmen <mikael.holmen@ericsson.com>
+Date:   Thu Feb 1 06:38:34 2018 +0000
+
+    [LSR] Don't force bases of foldable formulae to the final type.
+    
+    Summary:
+    Before emitting code for scaled registers, we prevent
+    SCEVExpander from hoisting any scaled addressing mode
+    by emitting all the bases first. However, these bases
+    are being forced to the final type, resulting in some
+    odd code.
+    
+    For example, if the type of the base is an integer and
+    the final type is a pointer, we will emit an inttoptr
+    for the base, a ptrtoint for the scale, and then a
+    'reverse' GEP where the GEP pointer is actually the base
+    integer and the index is the pointer. It's more intuitive
+    to use the pointer as a pointer and the integer as index.
+    
+    Patch by: Bevin Hansson
+    
+    Reviewers: atrick, qcolombet, sanjoy
+    
+    Reviewed By: qcolombet
+    
+    Subscribers: llvm-commits
+    
+    Differential Revision: https://reviews.llvm.org/D42103
+    
+    git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323946 91177308-0d34-0410-b5e6-96231b3b80d8
+
+diff --git a/lib/Transforms/Scalar/LoopStrengthReduce.cpp b/lib/Transforms/Scalar/LoopStrengthReduce.cpp
+index 332c074a1df..4b8e2286ed9 100644
+--- a/lib/Transforms/Scalar/LoopStrengthReduce.cpp
++++ b/lib/Transforms/Scalar/LoopStrengthReduce.cpp
+@@ -4993,7 +4993,7 @@ Value *LSRInstance::Expand(const LSRUse &LU, const LSRFixup &LF,
+       // Unless the addressing mode will not be folded.
+       if (!Ops.empty() && LU.Kind == LSRUse::Address &&
+           isAMCompletelyFolded(TTI, LU, F)) {
+-        Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty);
++        Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), nullptr);
+         Ops.clear();
+         Ops.push_back(SE.getUnknown(FullV));
+       }

debian/patches/series

@@ -12,7 +12,8 @@ silent-gold-test.diff
 atomic_library_1.diff
 python-clangpath.diff
 fix-clang-path-and-build.diff
-force-gcc-header-obj.diff
+# commented because of bug 903709
+#force-gcc-header-obj.diff
 do-not-fail-on-unexpected-pass.diff
 silent-more-tests.diff
 disable-display-PASS-UNSUPPORTED-XFAIL.diff
@@ -54,3 +55,8 @@ remove-test-freezing.diff
 0048-Set-html_static_path-_static-everywhere.patch
 0049-Use-Debian-provided-MathJax-everywhere.patch
 ubuntu-cosmic-support.patch
+D40146-JumpThreading-backport-1.diff
+D42717-JumpThreading-backport-2.diff
+llvm-D49832-SCEVPred.patch
+llvm-rL323946-LSRTy.patch
+PowerPC-Make-AddrSpaceCast-noop.diff

debian/rules

@@ -145,7 +145,7 @@ else
 endif
 
 LLDB_ENABLE=yes
-LLDB_DISABLE_ARCHS := hurd-i386 ia64 mips64el powerpc powerpcspe ppc64 ppc64el s390x sparc64
+LLDB_DISABLE_ARCHS := hurd-i386 ia64 mips64el powerpc powerpcspe ppc64 s390x sparc64
 # hurd has threading issues
 ifeq (,$(filter-out $(LLDB_DISABLE_ARCHS), $(DEB_HOST_ARCH)))
 # Disable LLDB for this arch.