Commits on Source (67)
-
Jonathan Marek authored
Fixes: 912a9c8d Signed-off-by:
Jonathan Marek <jonathan@marek.ca> Cc: 19.0 <mesa-stable@lists.freedesktop.org> (cherry picked from commit 3361305f)
-
Eric Engestrom authored
Fixes: c7b65dca "xvmc: Define some Xv attribs to allow users to specify color standard and procamp" Cc: Christian König <christian.koenig@amd.com> Signed-off-by:
Eric Engestrom <eric.engestrom@intel.com> (cherry picked from commit 110a6e18)
-
Eric Engestrom authored
Fixes: 6fca1869 "g3dvl: Update XvMC unit tests." Cc: Younes Manton <younes.m@gmail.com> Signed-off-by:
-
Bas Nieuwenhuizen authored
For example with VK_EXT_buffer_device_address or VK_KHR_variable_pointers. Fixes: a2b5cc3c "radv: enable variable pointers" Reviewed-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> (cherry picked from commit 00253ab2)
-
Bas Nieuwenhuizen authored
Fixes: a2b5cc3c "radv: enable variable pointers" Reviewed-by:
-
Bas Nieuwenhuizen authored
Reviewed-by:
-
Bas Nieuwenhuizen authored
Fixes: a2b5cc3c "radv: enable variable pointers" Reviewed-by:
-
Bas Nieuwenhuizen authored
Can happen e.g. after a phi. Fixes: a2b5cc3c "radv: enable variable pointers" Reviewed-by:
-
Kristian Høgsberg authored
We're writing to the bo and the kernel needs to know for fd_bo_cpu_prep() to work. Fixes: f93e4312 ("freedreno/a6xx: Enable blitter") Reviewed-by:
Rob Clark <robdclark@gmail.com> Signed-off-by:
Kristian H. Kristensen <hoegsberg@chromium.org> (cherry picked from commit 357ea7da)
-
Ilia Mirkin authored
We used to pre-set a bunch of extra arguments to a texture instruction in order to force the RA to allocate a register at the boundary of 4. However with the levelZero optimization, which removes a LOD argument when it's uniformly equal to zero, we undid that logic by removing an extra argument. As a result, we could end up with insufficient alignment on the second wide texture argument. Instead we switch to a different method of achieving the same result. The logic runs during the constraint analysis of the RA, and adds unset sources as necessary right before being merged into a wide argument. Fixes MISALIGNED_REG errors in Hitman when run with bindless textures enabled on a GK208. Fixes: 9145873b ("nvc0/ir: use levelZero flag when the lod is set to 0") Signed-off-by:
Ilia Mirkin <imirkin@alum.mit.edu> Cc: 19.0 <mesa-stable@lists.freedesktop.org> (cherry picked from commit 5de5beed)
-
Ian Romanick authored
Fixes: cd56d79b "nir: check NIR_SKIP to skip passes by name" Reviewed-by:
Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Reviewed-by:
Timothy Arceri <tarceri@itsqueeze.com> (cherry picked from commit 78169870)
-
Faith Ekstrand authored
When nir_rematerialize_derefs_in_use_blocks_impl was first written, I attempted to optimize things a bit by not bothering to re-materialize the sources of deref instructions figuring that the final caller would take care of that. However, in the case of more complex deref chains where the first link or two lives in block A and then another link and the load/store_deref intrinsic live in block B it doesn't work. The code in rematerialize_deref_in_block looks at the tail of the chain, sees that it's already in block B and skips it, not realizing that part of the chain also lives in block A. The easy solution here is to just rematerialize deref sources of deref instructions as well. This may potentially lead to a few more deref instructions being created by the conditions required for that to actually happen are fairly unlikely and, thanks to the caching, it's all linear time regardless. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109603 Fixes: 7d1d1208 "nir: Add a small pass to rematerialize derefs per-block" Reviewed-by:
Alejandro Piñeiro <apinheiro@igalia.com> (cherry picked from commit 9e6a6ef0)
-
Dylan Baker authored
-
Dylan Baker authored
This reverts commit af07141b.
-
Dylan Baker authored
This reverts commit 378f9967. This also remove the default true argument from the a2xx nir backend, which was introduced after this commit. There should be no change in functionality.
-
Dylan Baker authored
This reverts commit 8fb8ebfb.
-
Dylan Baker authored
-
Marek Olšák authored
autotools doesn't have any requirement. This fixes meson on Ubuntu 16.04. Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org> Reviewed-by:
Erik Faye-Lund <erik.faye-lund@collabora.com> (cherry picked from commit 1e85cfb9)
-
Ilia Mirkin authored
Signed-off-by:
-
Bart Oldeman authored
When Mesa is compiled for gallium-xlib using e.g. ./configure --enable-glx=gallium-xlib --disable-dri --disable-gbm -disable-egl and is used by an X server (usually remotely via SSH X11 forwarding) that does not support MIT-SHM such as XMing or MobaXterm, OpenGL clients report error messages such as Xlib: extension "MIT-SHM" missing on display "localhost:11.0". ad infinitum. The reason is that the code in src/gallium/winsys/sw/xlib uses MIT-SHM without checking for its existence, unlike the code in src/glx/drisw_glx.c and src/mesa/drivers/x11/xm_api.c. I copied the same check using XQueryExtension, and tested with glxgears on MobaXterm. This issue was reported before here: https://lists.freedesktop.org/archives/mesa-users/2016-July/001183.html Reviewed-by:
Eric Anholt <eric@anholt.net> Reviewed-by:
Emil Velikov <emil.velikov@collabora.com> Cc: <mesa-stable@lists.freedesktop.org> (cherry picked from commit a203eaa4)
-
Bas Nieuwenhuizen authored
Equivalent of ANV patch c7f4a286 CC: <mesa-stable@lists.freedesktop.org> Reviewed-by:
-
Bas Nieuwenhuizen authored
The check was for 1 bit being set, which is clearly not what we want. CC: <mesa-stable@lists.freedesktop.org> Reviewed-by:
-
Ilia Mirkin authored
The hardware does not natively support FIXED and DOUBLE formats. If those are used in an indirect draw, they have to be converted. Our conversion tries to be clever about only converting the data that's needed. However for indirect, that won't work. Given that DOUBLE or FIXED are highly unlikely to ever be used with indirect draws, read the indirect buffer on the CPU and issue draws directly. Fixes the failing dEQP-GLES31.functional.draw_indirect.random.* tests. Signed-off-by:
-
Ilia Mirkin authored
Atomic operations don't update the local cache, which means that we would have to issue CCTL operations in order to get the updated values. When we know that a buffer is primarily used for atomic operations, it's easier to just avoid the caching at that level entirely. The same issue persists for non-atomic buffers, which will have to be fixed separately. Fixes the failing dEQP-GLES31.functional.atomic_counter.* tests. Signed-off-by:
Karol Herbst <kherbst@redhat.com> Cc: 19.0 <mesa-stable@lists.freedesktop.org> (cherry picked from commit 4443b6dd)
-
Ilia Mirkin authored
Looks like SUBFM.3D and SUEAU are perfectly capable of dealing with 3d tiling, they just need the correct inputs. Supply them. We also have to deal with the case where a 2d "layer" of a 3d image is bound. In this case, we supply the z coordinate separately to the shader, which has to optionally treat every 2d case as if it could be a slice of a 3d texture. Signed-off-by:
-
Ilia Mirkin authored
For the NO_WAIT variants, we would jump into the ALWAYS case for both nested and inverted occlusion queries. However if the query had previously completed, the application could reasonably expect that the render condition would follow that result. To resolve this, we remove the nesting distinction which unnecessarily created an imbalance between the regular and inverted cases (since there's no "zero" condition mode). We also use the proper comparison if we know that the query has completed (which could happen as a result of an earlier get_query_result call). Fixes KHR-GL45.conditional_render_inverted.functional Signed-off-by:
-
Ilia Mirkin authored
Not quite perfect, but at least we don't end up with random values in the query buffer. Fixes KHR-GL45.pipeline_statistics_query_tests_ARB.functional_default_qo_values Signed-off-by:
-
Boyan Ding authored
Signed-off-by:
Boyan Ding <boyan.j.ding@gmail.com> Acked-by:
-
Boyan Ding authored
Signed-off-by:
-
Boyan Ding authored
v2: (Karol Herbst <kherbst@redhat.com> * fix Value setup for the builtins Signed-off-by:
-
Karol Herbst authored
[imirkin: add a few more "long" prefixes to safen things up] Acked-by:
-
Karol Herbst authored
Acked-by:
-
Karol Herbst authored
Acked-by:
-
Karol Herbst authored
Some NVIDIA hardware can accept 128 fragment shader input components, but only have up to 124 varying-interpolated input components. We add a new cap to express this cleanly. For most drivers, this will have the same value as PIPE_SHADER_CAP_MAX_INPUTS for the fragment shader. Fixes KHR-GL45.limits.max_fragment_input_components Conflicts resolved by Dylan Signed-off-by:
Karol Herbst <karolherbst@gmail.com> [imirkin: rebased, improved docs/commit message] Signed-off-by:
Marek Olšák <marek.olsak@amd.com> Cc: 19.0 <mesa-stable@lists.freedesktop.org> (cherry picked from commit 6010d7b8)
-
Karol Herbst authored
If the driver does not support rendering to these formats but does support texturing, we can end up in incompatibilities between textures and renderbuffers that are then copied to. Fixes KHR-GL45.copy_image.functional on nvc0 Reviewed-by:
-
Ilia Mirkin authored
For some reason we don't use view volume clipping by default, and use scissors instead. These scissors were set to an 8k max fb size, while the driver advertises 16k-sized framebuffers. Signed-off-by:
-
Marek Olšák authored
Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org> Reviewed-by:
Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 4522f01d)
-
Marek Olšák authored
Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org> Reviewed-by:
-
Marek Olšák authored
wow, it's hard to believe that fence and syncobjs dependencies were ignored. Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org> Reviewed-by:
-
Leo Liu authored
Add "PIPE_VIDEO_PROFILE_MAX" to enum, so it will make sure here will be correct when adding more profiles in the future. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109107 Signed-off-by:
Leo Liu <leo.liu@amd.com> Reviewed-by:
Boyuan Zhang <boyuan.zhang@amd.com> Cc: 19.0 <mesa-stable@lists.freedesktop.org> (cherry picked from commit 21cdb828)
-
Leo Liu authored
If there is no information about number of render targets Signed-off-by:
-
Kenneth Graunke authored
Piglit's vp-max-array test creates a vertex program containing a uniform array sized to the value of GL_MAX_NATIVE_PROGRAM_PARAMETERS_ARB. Mesa will then add additional state-var parameters for things like the MVP matrix. radeonsi currently exposes a value of 4096, derived from constant buffer upload size. This means the array will have 4096 elements, and the extra MVP state-vars would get a prog_src_register::Index of over 4096. Unfortunately, prog_src_register::Index is a signed 13-bit integer, so values beyond 4096 end up turning into negative numbers. Negative source indexes are only valid for relative addressing, so this ends up generating illegal IR. In prog_to_nir, this would cause an out of bounds array access. st_mesa_to_tgsi checks for a negative value, assumes it's bogus, and remaps it to parameter 0 in order to get something in-range. This isn't right - instead of reading the MVP matrix, it would read the first element of the vertex program's large array. But the test only checks that the program compiles, so we never noticed that it was broken. This patch limits the size of the program limits, with the understanding that we may need to generate additional state-vars internally. i965 has exposed 1024 for this limit for years, so I don't expect lowering it to 2048 will cause any practical problems for radeonsi or other drivers. Fixes vp-max-array with prog_to_nir.c. Cc: "19.0" <mesa-stable@lists.freedesktop.org> Reviewed-by:
-
Samuel Pitoiset authored
"The C standard says that compound literals which occur inside of the body of a function have automatic storage duration associated with the enclosing block. Older GCC releases were putting such compound literals into the scope of the whole function, so their lifetime actually ended at the end of containing function. This has been fixed in GCC 9. Code that relied on this extended lifetime needs to be fixed, move the compound literals to whatever scope they need to accessible in." Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109543 Cc: <mesa-stable@lists.freedesktop.org> Signed-off-by:
Gustaw Smolarczyk <wielkiegie@gmail.com> Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (cherry picked from commit 129a9f49)
-
Samuel Pitoiset authored
This fixes a critical issue. Cc: <mesa-stable@lists.freedesktop.org> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109575 Signed-off-by:
-
Juan A. Suarez Romero authored
This can happen when we record a VkCmdDraw in a secondary buffer that was created inheriting from the primary buffer, but with the framebuffer set to NULL in the VkCommandBufferInheritanceInfo. Vulkan 1.1.81 spec says that "the application must ensure (using scissor if neccesary) that all rendering is contained in the render area [...] [which] must be contained within the framebuffer dimesions". While this should be done by the application, commit 465e5a86 added the clamp to the framebuffer size, in case of application does not do it. But this requires to know the framebuffer dimensions. If we do not have a framebuffer at that moment, the best compromise we can do is to just apply the scissor as it is, and let the application to ensure the rendering is contained in the render area. v2: do not clamp to framebuffer if there isn't a framebuffer v3 (Jason): - clamp earlier in the conditional - clamp to render area if command buffer is primary v4: clamp also x and y to render area (Jason) v5: rename used variables (Jason) Fixes: 465e5a86 ("anv: Clamp scissors to the framebuffer boundary") CC: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit 1ad26f94)
-
Dylan Baker authored
-
Oscar Blumberg authored
Stop using 12.12 quantization for viewports that are not contained in the lower 4k corner of the render target as the hardware needs to keep both absolute and relative coordinates representable. Signed-off-by:
-
Karol Herbst authored
if we have something like this: loop { ... if x { break; } else { continue; } } opt_if_loop_last_continue returns true marking progress allthough nothing changes. Fixes: 5921a19d "nir: add if opt opt_if_loop_last_continue()" Signed-off-by: -
Dylan Baker authored
Because none of them have been picked up for 19.0 due to this bug being reintroduced. v2: - Fix fixes tags Fixes: e6b3a3b2 ("bin/get-pick-list.sh: handle "typod" usecase.") Fixes: fac10169 ("bin/get-pick-list.sh: prefix output with "[stable] "") Reviewed-by:
Andres Gomez <agomez@igalia.com> Reviewed-by:
-
Samuel Pitoiset authored
Fixes: 50fd253b ("radv/winsys: Add priority handling during submit.") Signed-off-by:
-
Samuel Pitoiset authored
For some reasons, this breaks trees rendering in Project Cars. Fixes: 85010585 ("radv: only enable gl_SampleMask if MSAA is enabled too") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109401 Signed-off-by:
-
Dylan Baker authored
Currently the Intel "anvil" driver races with the generation of genxml files, while i965 has an explicit dependency. This patch adds the same dependency to anvil. Fixes: d1992255 ("meson: Add build Intel "anv" vulkan driver") Acked-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
-
Ian Romanick authored
Reviewed-by:
-
Kenneth Graunke authored
My patch to switch from struct-based MOCS to numeric MOCS accidentally divided all MOCS entries by 2 in the Vulkan driver. MOCS on Gen9+ is just an array index into a table. But in the hardware packets, the index starts at bit 1. So we need to shift it. Fixes: 0b44644c (genxml: Consistently use a numeric "MOCS" field) Reviewed-by:
-
Ilia Mirkin authored
Unfortunately swr was missed in the original commit. The number of varyings should generally match up to what's reported as the shader caps for fragment inputs. Fixes: 6010d7b8 (gallium: add PIPE_CAP_MAX_VARYINGS) Signed-off-by:
Alok Hota <alok.hota@intel.com> Cc: 19.0 <mesa-stable@lists.freedesktop.org> (cherry picked from commit 8c859367)
-
Faith Ekstrand authored
This fixes a bug in runscape where we were optimizing x >> 16 to an extract and then negating and converting to float. The NIR to fs pass was dropping the negate on the floor breaking a geometry shader and causing it to render nothing. Fixes: 1f862e92 "i965/fs: Optimize float conversions of byte/word..." Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109601 Tested-by:
Matt Turner <mattst88@gmail.com> (cherry picked from commit 367b0ede)
-
Matt Turner authored
v2: Fix silly bug in logic. s/||/&&/ All but one of the affected shaders is in an Unreal4 demo. The other is in Tomb Raider. All of the cases that Ian investigated appear to be sequences like the following if (int(uint(some_float)) < 0) /* other relations too */ ... At least in Tomb Raider, it's not obvious that this sequence came from the original shader. In some of the Unreal demos, the shader contains code like if (int(uint(textureLod(...))) > 0) ... which explicitly generates the offending sequence. All Gen6+ platforms had similar results (Skylake shown): total instructions in shared programs: 15437170 -> 15437187 (<.01%) instructions in affected programs: 4492 -> 4509 (0.38%) helped: 0 HURT: 17 HURT stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1 HURT stats (rel) min: 0.05% max: 0.73% x̄: 0.66% x̃: 0.73% 95% mean confidence interval for instructions value: 1.00 1.00 95% mean confidence interval for instructions %-change: 0.57% 0.75% Instructions are HURT. total cycles in shared programs: 383007996 -> 383007992 (<.01%) cycles in affected programs: 20542 -> 20538 (-0.02%) helped: 6 HURT: 7 helped stats (abs) min: 2 max: 6 x̄: 5.33 x̃: 6 helped stats (rel) min: 0.11% max: 0.36% x̄: 0.32% x̃: 0.36% HURT stats (abs) min: 4 max: 4 x̄: 4.00 x̃: 4 HURT stats (rel) min: 0.27% max: 0.27% x̄: 0.27% x̃: 0.27% 95% mean confidence interval for cycles value: -3.30 2.69 95% mean confidence interval for cycles %-change: -0.19% 0.19% Inconclusive result (value mean confidence interval includes 0). No changes on Iron Lake or GM45. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109404 Reviewed-by:Ian Romanick <ian.d.romanick@intel.com> Reviewed-by:
<nagrigoriadis@gmail.com> Tested-by:
Danylo Piliaiev <danylo.piliaiev@gmail.com> (cherry picked from commit 2dff9a66)
-
Matt Turner authored
v2 (idr): Move adding the test to after adding the fix. Reordering the two commits prevents possible headaches for git-bisect with scripts that always do 'ninja check'. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109404 Reviewed-by:
-
Kenneth Graunke authored
The idea here is to reassociate a * (b * c) into (a * c) * b, when b is a non-constant value, but a and c are constants, allowing them to be combined. But nothing was enforcing that 'b' must be non-constant, which meant that running opt_algebraic in a loop would never terminate if the IR contained non-folded constant expressions like 256 * 0.5 * 2. Normally, we call constant folding in such a loop too, but IMO it's better for nir_opt_algebraic to be robust and not rely on that. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109581 Fixes: 32e266a9 i965: Compile fp64 funcs only if we do not have 64-bit hardware support Reviewed-by:
-
Samuel Pitoiset authored
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109597 Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org> Signed-off-by:
-
Samuel Pitoiset authored
This version is better and safer. Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org> Signed-off-by:
-
Emma Anholt authored
Apparently we need disable-EZ flagged, not just "does Z writes". Fixes dEQP-GLES31.functional.image_load_store.early_fragment_tests.no_early_fragment_tests_depth_fbo on 7278, even though it passed in simulation. Signed-off-by:
-
Emma Anholt authored
The execute.file check used to be good enough, until I stopped setting up the execute mask for uniform ifs. No known tests fixed, noticed while doing a refactor. Fixes: 08050605 ("v3d: Handle dynamically uniform IF statements with uniform control flow.") (cherry picked from commit 44129496)
-
Rhys Perry authored
16-bit outputs are stored as 16-bit floats in the outputs array, so they have to be bitcast. Fixes: b722b29f ('radv: add support for 16bit input/output') Signed-off-by:
Rhys Perry <pendingchaos02@gmail.com> Reviewed-by:
-
Rhys Perry authored
So that the signature is correct and consistent, the inputs to a export intrinsic should always be 32-bit floats. This and the previous commit fixes a large amount crashes from dEQP-VK.spirv_assembly.instruction.graphics.16bit_storage.input_output_int_* tests Fixes: b722b29f ('radv: add support for 16bit input/output') Signed-off-by:
-
Tapani Pälli authored
This fixes invalid access to Attachment array which would occur if caller would exceed MaxColorAttachments. In practice this should not ever happen because DiscardFramebufferEXT specifies only GL_COLOR_ATTACHMENT0 to be valid and InvalidateFramebuffer will error out before but this should make coverity happy. v2: const, remove _EXT (Ian) CID: 1442559 Fixes: 0c42b5f3 "mesa: wire up InvalidateFramebuffer" Signed-off-by:
Tapani Pälli <tapani.palli@intel.com> Reviewed-by:
-
Dylan Baker authored
bin/.cherry-ignore
0 → 100644