Commits on Source (30)
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Juan A. Suarez Romero authored
Signed-off-by:Juan A. Suarez Romero <jasuarez@igalia.com>
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Samuel Pitoiset authored
We should stop walking through the CFG when the inner loop's break block ends up as the same block as the outer loop's continue block because we are already going to visit it. This fixes the following assertion which ends up by crashing in RADV or ANV: SPIR-V parsing FAILED: In file ../src/compiler/spirv/vtn_cfg.c:381 block->node.link.next == NULL 0 bytes into the SPIR-V binary This also fixes a crash with a camera shader from SteamVR. v2: make use of vtn_get_branch_type() and add an assertion Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106090 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106504 CC: 18.0 18.1 <mesa-stable@lists.freedesktop.org> Signed-off-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit 6bde8c56)
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Jan Vesely authored
Use pipe_reference to release old RAT surfaces. RAT surface adds a reference to pool bo, so use reference counting for pool->bo as well. v2: Use the same pattern for both defrag paths Drop confusing comment CC: <mesa-stable@lists.freedesktop.org> Signed-off-by:Jan Vesely <jan.vesely@rutgers.edu> Reviewed-by:
Dave Airlie <airlied@redhat.com> (cherry picked from commit f3521ce2)
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Stuart Young authoredSeems that when the rnndb files for etniviv were updated/included back in Nov 2017, hw/texdesc_3d.xml.h was missed from Makefile.sources and meson.build. This was all during the conversion to meson, so it apears to have slipped through the cracks. As such, this file has been missing from the official tarballs since inclusion in Mesa, so the git trees and tarballs differ. Found due to lintian errors in the Debian packages. Fixes: f1e1c60f ("etnaviv: Update from rnndb") Cc: mesa-stable@lists.freedesktop.org Reviewed-by:
Christian Gmeiner <christian.gmeiner@gmail.com> (cherry picked from commit f806cc9e)
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Juan A. Suarez Romero authored
stable: The commit requires earlier commit af4e9295 which did not land in branch. Signed-off-by:
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Nanley Chery authored
Before this patch, the aux_state was actually AUX_INVALID because the BO was never defined. This was fine on single slice miptrees because we would fast-clear the resource right after creation. For multi-slice miptrees on SKL+ however, this results in undefined behavior when accessing a non-base slice. Here's a specific example: 1) Fast clear level 0 * Undefined CCS_D buffer allocated in "PASS_THROUGH" state. * Level 0 transitions to the CLEAR state. 2) Render to level 1 * Level 1 may have a 2-bit pattern of 2's. * Rendering with a 2 in the CCS is undefined. Cc: <mesa-stable@lists.freedesktop.org> Reviewed-by:
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Bas Nieuwenhuizen authored
Otherwise stuff like NDEBUG would not be passed through. CC: <mesa-stable@lists.freedesktop.org> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106479 Reviewed-by:
Marek Olšák <marek.olsak@amd.com> (cherry picked from commit 62e0e089)
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Juan A. Suarez Romero authored
Signed-off-by: -
Bas Nieuwenhuizen authored
SRGB stores are broken. We had compensation code in the resolve path but none in the copy path. Since we don't want any conversion and it does not matter for DCC, just make everything UNORM instead. This happened to cause wrong colors for the PRIME path, as that uses image->buffer copies which always use the compute path. CC: 18.0 18.1 <mesa-stable@lists.freedesktop.org> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106587 Reviewed-by:
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Juan A. Suarez Romero authored
fixes: The commit fixes earlier commits 19a91841 and 9987a072 which did not land in branch. Signed-off-by:
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Timothy Arceri authored
Fixes: a017c7ec "mesa: display list support for uint uniforms" Reviewed-by:
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Anuj Phogat authored
2x6 configuration with pci-id 0x3185 has same number of banks (2) as 3x6 configuration (pci-id 0x3184). Reported-by:
Clayton Craft <clayton.a.craft@intel.com> Signed-off-by:
Anuj Phogat <anuj.phogat@gmail.com> Tested-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: eb23be1d "i965: Add and initialize l3_banks field for gen7+" Cc: Francisco Jerez <currojerez@riseup.net> (cherry picked from commit 0748383a)
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Samuel Pitoiset authored
It's legal to set the centroid and sample interpolation modes when MSAA disabled. So, we have to initialize the centroid inputs because the hardware doesn't. This fixes rendering issues with DXVK and The Witness, World of Warcraft, Trackmania and probably more games. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106315 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102390 CC: 18.0 18.1 <mesa-stable@lists.freedesktop.org> Signed-off-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (cherry picked from commit 73df16dc) [Juan A. Suarez: apply change in src/amd/common/ac_nir_to_llvm.c] Signed-off-by:
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Michel Dänzer authored
Prevents corrupting the upper 32 bits of draw->recv_sbc when draw->send_sbc resets to 0 (which currently happens when the window is unbound from a context and bound to one again), which in turn caused loader_dri3_swap_buffers_msc to calculate target_msc with corrupted upper 32 bits. This resulted in hangs with the Xorg modesetting driver as of xserver 1.20 (older versions and other drivers ignored the upper 32 bits of the target MSC, which is why this wasn't noticed earlier). Cc: mesa-stable@lists.freedesktop.org Bugzilla: https://bugs.freedesktop.org/106351 Tested-by:
Mike Lothian <mike@fireburn.co.uk> (cherry picked from commit fe2edb25) [Juan A. Suarez: resolve trivial conflicts] Conflicts: src/loader/loader_dri3_helper.c
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Dave Airlie authored
This fixes 4 out of 5 cases in: arb_framebuffer_no_attachments-atomic on cayman. Reviewed-by:
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Faith Ekstrand authored
Fixes: d6cd14f2 "i965/fs: Define new shader opcode to..." Reviewed-by:
Jose Maria Casanova Crespo <jmcasanova@igalia.com> (cherry picked from commit 417b9e57)
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Francisco Jerez authored
This reverts commit c0ed52f6. It was preventing the image format validation from being done on buffer textures, which is required to ensure that the application doesn't attempt to bind a buffer texture with an internal format incompatible with the image unit format (e.g. of different texel size), which is not allowed by the spec (it's not allowed for *any* texture target, whether or not there is spec wording restricting this behavior specifically for buffer textures) and will cause the driver to calculate texel bounds incorrectly and potentially crash instead of the expected behavior. Cc: mesa-stable@lists.freedesktop.org Reviewed-by:
Nanley Chery <nanley.g.chery@intel.com> (cherry picked from commit 5a681478)
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Francisco Jerez authored
The buffer texture size calculations (should be easy enough, right?) are repeated in three different places, each of them subtly broken in a different way. E.g. the image load/store path was never fixed to clamp to MaxTextureBufferSize, and none of them are taking into account the buffer offset correctly. It's easier to fix it all in one place. Cc: mesa-stable@lists.freedesktop.org Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106481 Reviewed-by:
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Francisco Jerez authored
Otherwise the specified surface state will allow the GPU to access memory up to BufferOffset bytes past the end of the buffer. Found by inspection. v2: Protect against out-of-range BufferOffset (Nanley). Cc: mesa-stable@lists.freedesktop.org Reviewed-by:
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Francisco Jerez authored
Instead of directly using intel_obj->buffer. Among other things intel_bufferobj_buffer() will update intel_buffer_object:: gpu_active_start/end, which are used by glBufferSubData() to decide which path to take. Fixes a failure in the Piglit ARB_shader_image_load_store-host-mem-barrier Buffer Update/WaW tests, which could be reproduced with a non-standard glGetTexSubImage implementation (see bug report). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105351 Reported-by:
Nanley Chery <nanleychery@gmail.com> Cc: mesa-stable@lists.freedesktop.org Reviewed-by:
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Jose Dapena Paz authored
When glUseProgram is used, references to the included shaders are added in ctx->Shader.ReferencedProgram. But those references are not decreased when the shader data is deallocated. Thus, those shaders are leaked. Explicitely remove the pending references to these shaders. Fixes: e6506b3c ("mesa: retain gl_shader_programs after glDeleteProgram if they are in use") Reviewed-by:
Timothy Arceri <tarceri@itsqueeze.com> (cherry picked from commit 6c61c31d)
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Marek Olšák authored
This fixes shader images where we always bind stObj->pt and not individual gl_texture_images. Roughly based on i965 commit 845ad266 which does a similar thing but for a different reason. This fixes GL CTS assertion failures introduced by Ilia. Cc: 18.0 18.1 <mesa-stable@lists.freedesktop.org> Reviewed-by:
Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit a4ba7cd6)
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Marek Olšák authored
I don't know if it caused issues. Cc: 18.0 18.1 <mesa-stable@lists.freedesktop.org> Reviewed-by:
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Faith Ekstrand authored
For certain EGLImage cases, we represent a single slice or LOD of an image with a byte offset to a tile and X/Y intratile offsets to the given slice. Most of i965 is fine with this but it breaks blorp. This is a terrible way to represent slices of a surface in EGL and we should stop some day but that's a very scary and thorny path. This gets blorp to start working with those surfaces and fixes some dEQP EGL test bugs. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106629 Cc: mesa-stable@lists.freedesktop.org Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit ae514ca6)
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Juan A. Suarez Romero authored
stable: Tegra support was not added in the current branch. Signed-off-by: -
Marek Olšák authored
Bindless texture handles can be passed via vertex attribs using this type. This fixes a bunch of bindless piglit tests on radeonsi. Cc: 18.0 18.1 <mesa-stable@lists.freedesktop.org> Reviewed-by:
Ilia Mirkin <imirkin@alum.mit.edu> (cherry picked from commit a8e14138) [Juan A. Suarez: resolve trivial conflict] Signed-off-by:
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Juan A. Suarez Romero authored
stable: The commit requires earlier commit 19a91841 which did not land in branch. Signed-off-by:
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Juan A. Suarez Romero authored
stable: Explicit 18.1 only nomination. Signed-off-by: -
Juan A. Suarez Romero authored
Signed-off-by: -
Juan A. Suarez Romero authored
Signed-off-by:
docs/relnotes/18.0.5.html
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