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Commits on Source (43)
......@@ -23,6 +23,9 @@ e0c7114eb3c19d4c2653f661698a6baa3bc9bedf st/mesa: disable L3 thread pinning
b5f213bb1dcde22949dffe9d3a431fecd5d0f33b radv: binding streamout buffers doesn't change context regs
9367514524f70faad99c721bac92339c8ff8bad9 radeonsi: fix video APIs on Raven2
ea9f95e2a67eca90bb84eea24e7b4b804b3b1345 radeonsi: go back to using bottom-of-pipe for beginning of TIME_ELAPSED
8f401b0ce6e6650e1a85e9bb2be23d5ff08812b8 anv,radv: Disable VK_EXT_pci_bus_info
8c77f4c76ddfe0b692b430b012b65f6981a53336 meson: Add support for gnu hurd
7a90886921eb1d5d73b40aadd6fd3f340041bd26 meson: Add toggle for glx-direct
# fixes: This commit was reverted by commit 5f312e95f87.
a9031bf9b55602d93cccef6c926e2179c23205b4 i965/batch: avoid reverting batch buffer if saved state is an empty
# extra: intel/aub_viewer is not present in branch
......@@ -37,3 +40,17 @@ d0c7b079d07f751eb37ecaa45a2a6db920d71d7a freedreno: Fix autotools build.
# pick: While this commit does not include the proper CC tag, it was intended
# to be applied only in 18.3 branch.
017199d2d2e4c57015bc60edfcc656062c3a7472 mesa: Revert INTEL_fragment_shader_ordering support
# fixes: The changes this commit provides are already included in the branch.
ff6f1dd0d3c6b4c15ca51b478b2884d14f6a1e06 meson: libfreedreno depends upon libdrm (for fence support)
# fixes: This commit requires commits aeaf8dbd097 and 7484bc894b9 which did not
# land in branch.
f67dea5e19ef14187be0e8d0f61b1f764c7ccb4f radv: Fix multiview depth clears
# fixes: There is a specific patch for stable franch for this commit.
bde9f482de69528db5ccf5dd6bbfd8359adfbb19 ac: split 16-bit ssbo loads that may not be dword aligned
# pick: This commit is nominated to stable, but fixes commit b3c61469255 which
# is in 18.3 stable. Hence, this commit is considered as nominated to
# 18.3 stable.
947f7b452a550c66cfb9a8c9518e35635eb25947 nir: properly find the entry to keep in copy_prop_vars
# pick: This commit is nominated to stable, but fixes commit 11dc1307794 which
# is not in the current stable branch.
d6110d4d547ad98dce7a89d0e020ab5be5aaaad6 intel/compiler: move nir_lower_bool_to_int32 before nir_lower_locals_to_regs
......@@ -21,31 +21,46 @@ is_typod_nomination()
git show --summary "$1" | grep -q -i -o "CC:.*mesa-dev"
}
fixes=
# Helper to handle various mistypos of the fixes tag.
# The tag string itself is passed as argument and normalised within.
#
# Resulting string in the global variable "fixes" and contains entries
# in the form "fixes:$sha"
is_sha_nomination()
{
fixes=`git show --pretty=medium -s $1 | tr -d "\n" | \
sed -e 's/'"$2"'/\nfixes:/Ig' | \
grep -Eo 'fixes:[a-f0-9]{8,40}'`
fixes_count=`echo "$fixes" | wc -l`
fixes_count=`echo "$fixes" | grep "fixes:" | wc -l`
if test $fixes_count -eq 0; then
return 0
return 1
fi
# Throw a warning for each invalid sha
while test $fixes_count -gt 0; do
# Treat only the current line
id=`echo "$fixes" | tail -n $fixes_count | head -n 1 | cut -d : -f 2`
fixes_count=$(($fixes_count-1))
# Bail out if we cannot find suitable id.
# Any specific validation the $id is valid and not some junk, is
# implied with the follow up code
if test "x$id" = x; then
continue
if ! git show $id &>/dev/null; then
echo WARNING: Commit $1 lists invalid sha $id
fi
done
#Check if the offending commit is in branch.
return 0
}
# Checks if at least one of offending commits, listed in the global
# "fixes", is in branch.
sha_in_range()
{
fixes_count=`echo "$fixes" | grep "fixes:" | wc -l`
while test $fixes_count -gt 0; do
# Treat only the current line
id=`echo "$fixes" | tail -n $fixes_count | head -n 1 | cut -d : -f 2`
fixes_count=$(($fixes_count-1))
# Be that cherry-picked ...
# ... or landed before the branchpoint.
......@@ -103,20 +118,30 @@ do
continue
fi
if is_stable_nomination "$sha"; then
tag=stable
elif is_typod_nomination "$sha"; then
tag=typod
elif is_fixes_nomination "$sha"; then
if is_fixes_nomination "$sha"; then
tag=fixes
elif is_brokenby_nomination "$sha"; then
tag=brokenby
elif is_revert_nomination "$sha"; then
tag=revert
elif is_stable_nomination "$sha"; then
tag=stable
elif is_typod_nomination "$sha"; then
tag=typod
else
continue
fi
case "$tag" in
fixes | brokenby | revert )
if ! sha_in_range; then
continue
fi
;;
* )
;;
esac
printf "[ %8s ] " "$tag"
git --no-pager show --summary --oneline $sha
done
......
......@@ -1698,6 +1698,8 @@ xdri)
if test x"$enable_dri" = xyes; then
dri_modules="$dri_modules xcb-dri2 >= $XCBDRI2_REQUIRED"
fi
dri_modules="$dri_modules xxf86vm"
fi
if test x"$dri_platform" = xapple ; then
DEFINES="$DEFINES -DGLX_USE_APPLEGL"
......@@ -1707,8 +1709,6 @@ xdri)
fi
fi
dri_modules="$dri_modules xxf86vm"
PKG_CHECK_MODULES([DRIGL], [$dri_modules])
GL_PC_REQ_PRIV="$GL_PC_REQ_PRIV $dri_modules"
X11_INCLUDES="$X11_INCLUDES $DRIGL_CFLAGS"
......
......@@ -31,7 +31,8 @@ Compatibility contexts may report a lower version depending on each driver.
<h2>SHA256 checksums</h2>
<pre>
TBD
092351cfbcd430ec595fbd3a3d8d253fd62c29074e1740d7198b00289ab400f8 mesa-18.2.7.tar.gz
9c7b02560d89d77ca279cd21f36ea9a49e9ffc5611f6fe35099357d744d07ae6 mesa-18.2.7.tar.xz
</pre>
......
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.2.8 Release Notes / December 27, 2018</h1>
<p>
Mesa 18.2.8 is a bug fix release which fixes bugs found since the 18.2.7 release.
</p>
<p>
Mesa 18.2.8 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
TBD
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108114">Bug 108114</a> - [vulkancts] new VK_KHR_16bit_storage tests fail.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108116">Bug 108116</a> - [vulkancts] stencil partial clear tests fail.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108910">Bug 108910</a> - Vkd3d test failure test_multisample_array_texture()</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108911">Bug 108911</a> - Vkd3d test failure test_clear_render_target_view()</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109081">Bug 109081</a> - [bisected] [HSW] Regression in clipping.user_defined.clip_* vulkancts tests</li>
</ul>
<h2>Changes</h2>
<p>Alex Deucher (3):</p>
<ul>
<li>pci_ids: add new vega10 pci ids</li>
<li>pci_ids: add new vega20 pci id</li>
<li>pci_ids: add new VegaM pci id</li>
</ul>
<p>Axel Davy (3):</p>
<ul>
<li>st/nine: Fix volumetexture dtor on ctor failure</li>
<li>st/nine: Bind src not dst in nine_context_box_upload</li>
<li>st/nine: Add src reference to nine_context_range_upload</li>
</ul>
<p>Caio Marcelo de Oliveira Filho (1):</p>
<ul>
<li>nir: properly clear the entry sources in copy_prop_vars</li>
</ul>
<p>Dylan Baker (1):</p>
<ul>
<li>meson: Fix ppc64 little endian detection</li>
</ul>
<p>Emil Velikov (9):</p>
<ul>
<li>glx: mandate xf86vidmode only for "drm" dri platforms</li>
<li>bin/get-pick-list.sh: rework handing of sha nominations</li>
<li>bin/get-pick-list.sh: warn when commit lists invalid sha</li>
<li>meson: don't require glx/egl/gbm with gallium drivers</li>
<li>pipe-loader: meson: reference correct library</li>
<li>TODO: glx: meson: build dri based glx tests, only with -Dglx=dri</li>
<li>glx: meson: drop includes from a link-only library</li>
<li>glx: meson: wire up the dispatch-index-check test</li>
<li>glx/test: meson: assorted include fixes</li>
</ul>
<p>Eric Anholt (2):</p>
<ul>
<li>v3d: Make sure that a thrsw doesn't split a multop from its umul24.</li>
<li>v3d: Add missing flagging of SYNCB as a TSY op.</li>
</ul>
<p>Erik Faye-Lund (2):</p>
<ul>
<li>virgl: wrap vertex element state in a struct</li>
<li>virgl: work around bad assumptions in virglrenderer</li>
</ul>
<p>Iago Toral Quiroga (1):</p>
<ul>
<li>intel/compiler: do not copy-propagate strided regions to ddx/ddy arguments</li>
</ul>
<p>Ian Romanick (2):</p>
<ul>
<li>i965/vec4/dce: Don't narrow the write mask if the flags are used</li>
<li>Revert "nir/lower_indirect: Bail early if modes == 0"</li>
</ul>
<p>Jan Vesely (1):</p>
<ul>
<li>clover: Fix build after clang r348827</li>
</ul>
<p>Jason Ekstrand (1):</p>
<ul>
<li>nir/constant_folding: Fix source bit size logic</li>
</ul>
<p>Jon Turney (1):</p>
<ul>
<li>glx: Fix compilation with GLX_USE_WINDOWSGL</li>
</ul>
<p>Juan A. Suarez Romero (7):</p>
<ul>
<li>docs: add sha256 checksums for 18.2.7</li>
<li>cherry-ignore: add explicit 18.3 only nominations</li>
<li>cherry-ignore: meson: libfreedreno depends upon libdrm (for fence support)</li>
<li>cherry-ignore: radv: Fix multiview depth clears</li>
<li>cherry-ignore: nir: properly find the entry to keep in copy_prop_vars</li>
<li>cherry-ignore: intel/compiler: move nir_lower_bool_to_int32 before nir_lower_locals_to_regs</li>
<li>Update version to 18.2.8</li>
</ul>
<p>Kirill Burtsev (1):</p>
<ul>
<li>loader: free error state, when checking the drawable type</li>
</ul>
<p>Lionel Landwerlin (1):</p>
<ul>
<li>anv: don't do partial resolve on layer &gt; 0</li>
</ul>
<p>Rhys Perry (2):</p>
<ul>
<li>radv: don't set surf_index for stencil-only images</li>
<li>ac: split 16-bit ssbo loads that may not be dword aligned</li>
</ul>
<p>Rob Clark (1):</p>
<ul>
<li>mesa/st/nir: fix missing nir_compact_varyings</li>
</ul>
<p>Samuel Pitoiset (1):</p>
<ul>
<li>radv: switch on EOP when primitive restart is enabled with triangle strips</li>
</ul>
<p>Vinson Lee (2):</p>
<ul>
<li>meson: Fix typo.</li>
<li>meson: Fix libsensors detection.</li>
</ul>
</div>
</body>
</html>
......@@ -219,6 +219,7 @@ CHIPSET(0x699F, POLARIS12)
CHIPSET(0x694C, VEGAM)
CHIPSET(0x694E, VEGAM)
CHIPSET(0x694F, VEGAM)
CHIPSET(0x6860, VEGA10)
CHIPSET(0x6861, VEGA10)
......@@ -227,8 +228,14 @@ CHIPSET(0x6863, VEGA10)
CHIPSET(0x6864, VEGA10)
CHIPSET(0x6867, VEGA10)
CHIPSET(0x6868, VEGA10)
CHIPSET(0x687F, VEGA10)
CHIPSET(0x6869, VEGA10)
CHIPSET(0x686A, VEGA10)
CHIPSET(0x686B, VEGA10)
CHIPSET(0x686C, VEGA10)
CHIPSET(0x686D, VEGA10)
CHIPSET(0x686E, VEGA10)
CHIPSET(0x686F, VEGA10)
CHIPSET(0x687F, VEGA10)
CHIPSET(0x69A0, VEGA12)
CHIPSET(0x69A1, VEGA12)
......@@ -240,6 +247,7 @@ CHIPSET(0x66A0, VEGA20)
CHIPSET(0x66A1, VEGA20)
CHIPSET(0x66A2, VEGA20)
CHIPSET(0x66A3, VEGA20)
CHIPSET(0x66A4, VEGA20)
CHIPSET(0x66A7, VEGA20)
CHIPSET(0x66AF, VEGA20)
......
......@@ -379,9 +379,9 @@ endif
if with_any_vk and (with_platform_x11 and not with_dri3)
error('Vulkan drivers require dri3 for X11 support')
endif
if with_dri or with_gallium
if with_glx == 'disabled' and not with_egl and not with_platform_haiku
error('building dri or gallium drivers require at least one window system')
if with_dri
if with_glx == 'disabled' and not with_egl and not with_gbm
error('building dri drivers require at least one windowing system')
endif
endif
......@@ -611,7 +611,7 @@ if with_gallium_st_nine
error('The nine state tracker requires gallium softpipe/llvmpipe.')
elif not (with_gallium_radeonsi or with_gallium_nouveau or with_gallium_r600
or with_gallium_r300 or with_gallium_svga or with_gallium_i915)
error('The nine state tracker requires at least on non-swrast gallium driver.')
error('The nine state tracker requires at least one non-swrast gallium driver.')
endif
if not with_dri3
error('Using nine with wine requires dri3')
......@@ -619,7 +619,12 @@ if with_gallium_st_nine
endif
if get_option('power8') != 'false'
if host_machine.cpu_family() == 'ppc64le'
# on old versions of meson the cpu family would return as ppc64le on little
# endian power8, this was changed in 0.48 such that the family would always
# be ppc64 regardless of endianness, and the the machine.endian() value
# should be checked. Since we support versions < 0.48 we need to use
# startswith.
if host_machine.cpu_family().startswith('ppc64') and host_machine.endian() == 'little'
if cc.get_id() == 'gcc' and cc.version().version_compare('< 4.8')
error('Altivec is not supported with gcc version < 4.8.')
endif
......@@ -949,7 +954,7 @@ if with_asm
with_asm_arch = 'sparc'
pre_args += ['-DUSE_SPARC_ASM']
endif
elif host_machine.cpu_family() == 'ppc64le'
elif host_machine.cpu_family().startswith('ppc64') and host_machine.endian() == 'little'
if system_has_kms_drm
with_asm_arch = 'ppc64le'
pre_args += ['-DUSE_PPC64LE_ASM']
......@@ -1330,7 +1335,6 @@ if with_platform_x11
dep_xdamage = dependency('xdamage', version : '>= 1.1')
dep_xfixes = dependency('xfixes')
dep_xcb_glx = dependency('xcb-glx', version : '>= 1.8.1')
dep_xxf86vm = dependency('xxf86vm')
endif
if (with_any_vk or with_glx == 'dri' or
(with_gallium_vdpau or with_gallium_xvmc or with_gallium_va or
......@@ -1357,6 +1361,7 @@ if with_platform_x11
if with_glx == 'dri'
if with_dri_platform == 'drm'
dep_dri2proto = dependency('dri2proto', version : '>= 2.8')
dep_xxf86vm = dependency('xxf86vm')
endif
dep_glproto = dependency('glproto', version : '>= 1.4.14')
endif
......@@ -1377,7 +1382,7 @@ endif
_sensors = get_option('lmsensors')
if _sensors != 'false'
dep_lmsensors = cc.find_library('libsensors', required : _sensors == 'true')
dep_lmsensors = cc.find_library('sensors', required : _sensors == 'true')
if dep_lmsensors.found()
pre_args += '-DHAVE_LIBSENSORS=1'
endif
......@@ -1407,9 +1412,9 @@ elif with_glx == 'dri'
'xcb-glx >= 1.8.1']
if with_dri_platform == 'drm'
gl_priv_reqs += 'xcb-dri2 >= 1.8'
endif
gl_priv_reqs += 'xxf86vm'
endif
endif
if dep_libdrm.found()
gl_priv_reqs += 'libdrm >= 2.4.75'
endif
......
......@@ -2729,9 +2729,11 @@ LLVMValueRef ac_trim_vector(struct ac_llvm_context *ctx, LLVMValueRef value,
if (count == num_components)
return value;
LLVMValueRef masks[] = {
LLVMConstInt(ctx->i32, 0, false), LLVMConstInt(ctx->i32, 1, false),
LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false)};
LLVMValueRef masks[MAX2(count, 2)];
masks[0] = ctx->i32_0;
masks[1] = ctx->i32_1;
for (unsigned i = 2; i < count; i++)
masks[i] = LLVMConstInt(ctx->i32, i, false);
if (count == 1)
return LLVMBuildExtractElement(ctx->builder, value, masks[0],
......
......@@ -1621,31 +1621,39 @@ static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
const nir_intrinsic_instr *instr)
{
LLVMValueRef results[2];
int load_bytes;
int elem_size_bytes = instr->dest.ssa.bit_size / 8;
int num_components = instr->num_components;
int num_bytes = num_components * elem_size_bytes;
for (int i = 0; i < num_bytes; i += load_bytes) {
load_bytes = MIN2(num_bytes - i, 16);
const char *load_name;
LLVMTypeRef data_type;
LLVMValueRef offset = get_src(ctx, instr->src[1]);
LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i, false);
LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
get_src(ctx, instr->src[0]), false);
LLVMValueRef vindex = ctx->ac.i32_0;
int idx = i ? 1 : 0;
LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
LLVMValueRef results[4];
for (int i = 0; i < num_components;) {
int num_elems = num_components - i;
if (elem_size_bytes < 4)
num_elems = 1;
if (num_elems * elem_size_bytes > 16)
num_elems = 16 / elem_size_bytes;
int load_bytes = num_elems * elem_size_bytes;
LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
LLVMValueRef ret;
if (load_bytes == 2) {
results[idx] = ac_build_tbuffer_load_short(&ctx->ac,
ret = ac_build_tbuffer_load_short(&ctx->ac,
rsrc,
vindex,
offset,
ctx->ac.i32_0,
immoffset);
} else {
const char *load_name;
LLVMTypeRef data_type;
switch (load_bytes) {
case 16:
case 12:
......@@ -1671,33 +1679,23 @@ static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
ctx->ac.i1false,
ctx->ac.i1false,
};
results[idx] = ac_build_intrinsic(&ctx->ac, load_name, data_type, params, 5, 0);
unsigned num_elems = ac_get_type_size(data_type) / elem_size_bytes;
LLVMTypeRef resTy = LLVMVectorType(LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size), num_elems);
results[idx] = LLVMBuildBitCast(ctx->ac.builder, results[idx], resTy, "");
}
ret = ac_build_intrinsic(&ctx->ac, load_name, data_type, params, 5, 0);
}
assume(results[0]);
LLVMValueRef ret = results[0];
if (num_bytes > 16 || num_components == 3) {
LLVMValueRef masks[] = {
LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
};
LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
if (num_bytes > 16 && num_components == 3) {
/* we end up with a v2i64 and i64 but shuffle fails on that */
results[1] = ac_build_expand(&ctx->ac, results[1], 1, 2);
}
LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
ret = LLVMBuildShuffleVector(ctx->ac.builder, results[0],
results[num_bytes > 16 ? 1 : 0], swizzle, "");
for (unsigned j = 0; j < num_elems; j++) {
results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
}
i += num_elems;
}
return LLVMBuildBitCast(ctx->ac.builder, ret,
get_def_type(ctx, &instr->dest.ssa), "");
return ac_build_gather_values(&ctx->ac, results, num_components);
}
static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
......
......@@ -966,7 +966,7 @@ radv_image_create(VkDevice _device,
image->shareable = vk_find_struct_const(pCreateInfo->pNext,
EXTERNAL_MEMORY_IMAGE_CREATE_INFO_KHR) != NULL;
if (!vk_format_is_depth(pCreateInfo->format) && !create_info->scanout && !image->shareable) {
if (!vk_format_is_depth_or_stencil(pCreateInfo->format) && !create_info->scanout && !image->shareable) {
image->info.surf_index = &device->image_mrt_offset_counter;
}
......
......@@ -3295,8 +3295,7 @@ radv_compute_ia_multi_vgt_param_helpers(struct radv_pipeline *pipeline,
(pipeline->graphics.prim_restart_enable &&
(device->physical_device->rad_info.family < CHIP_POLARIS10 ||
(prim != V_008958_DI_PT_POINTLIST &&
prim != V_008958_DI_PT_LINESTRIP &&
prim != V_008958_DI_PT_TRISTRIP))))
prim != V_008958_DI_PT_LINESTRIP))))
ia_multi_vgt_param.wd_switch_on_eop = true;
}
......
......@@ -392,6 +392,7 @@ calculate_deps(struct schedule_state *state, struct schedule_node *n)
for (int i = 0; i < ARRAY_SIZE(state->last_r); i++)
add_write_dep(state, &state->last_r[i], n);
add_write_dep(state, &state->last_sf, n);
add_write_dep(state, &state->last_rtop, n);
/* Scoreboard-locking operations have to stay after the last
* thread switch.
......
......@@ -551,6 +551,7 @@ bool
v3d_qpu_magic_waddr_is_tsy(enum v3d_qpu_waddr waddr)
{
return (waddr == V3D_QPU_WADDR_SYNC ||
waddr == V3D_QPU_WADDR_SYNCB ||
waddr == V3D_QPU_WADDR_SYNCU);
}
......
......@@ -205,9 +205,6 @@ nir_lower_indirect_derefs(nir_shader *shader, nir_variable_mode modes)
{
bool progress = false;
if (modes == 0)
return false;
nir_foreach_function(function, shader) {
if (function->impl)
progress = lower_indirects_impl(function->impl, modes) || progress;
......
......@@ -64,9 +64,8 @@ constant_fold_alu_instr(nir_alu_instr *instr, void *mem_ctx)
return false;
if (bit_size == 0 &&
!nir_alu_type_get_type_size(nir_op_infos[instr->op].input_sizes[i])) {
!nir_alu_type_get_type_size(nir_op_infos[instr->op].input_types[i]))
bit_size = instr->src[i].src.ssa->bit_size;
}
nir_instr *src_instr = instr->src[i].src.ssa->parent_instr;
......
......@@ -352,6 +352,9 @@ store_to_entry(struct copy_prop_var_state *state, struct copy_entry *entry,
{
entry->comps_may_be_read &= ~write_mask;
if (value->is_ssa) {
/* Clear src if it was being used as non-SSA. */
if (!entry->src.is_ssa)
memset(entry->src.ssa, 0, sizeof(entry->src.ssa));
entry->src.is_ssa = true;
/* Only overwrite the written components */
for (unsigned i = 0; i < 4; i++) {
......
......@@ -47,6 +47,12 @@
#include "virgl_resource.h"
#include "virgl_screen.h"
struct virgl_vertex_elements_state {
uint32_t handle;
uint8_t binding_map[PIPE_MAX_ATTRIBS];
uint8_t num_bindings;
};
static uint32_t next_handle;
uint32_t virgl_object_assign_handle(void)
{
......@@ -371,29 +377,54 @@ static void *virgl_create_vertex_elements_state(struct pipe_context *ctx,
unsigned num_elements,
const struct pipe_vertex_element *elements)
{
struct pipe_vertex_element new_elements[PIPE_MAX_ATTRIBS];
struct virgl_context *vctx = virgl_context(ctx);
uint32_t handle = virgl_object_assign_handle();
virgl_encoder_create_vertex_elements(vctx, handle,
num_elements, elements);
return (void*)(unsigned long)handle;
struct virgl_vertex_elements_state *state =
CALLOC_STRUCT(virgl_vertex_elements_state);
for (int i = 0; i < num_elements; ++i) {
if (elements[i].instance_divisor) {
/* Virglrenderer doesn't deal with instance_divisor correctly if
* there isn't a 1:1 relationship between elements and bindings.
* So let's make sure there is, by duplicating bindings.
*/
for (int j = 0; j < num_elements; ++j) {
new_elements[j] = elements[j];
new_elements[j].vertex_buffer_index = j;
state->binding_map[j] = elements[j].vertex_buffer_index;
}
elements = new_elements;
state->num_bindings = num_elements;
break;
}
}
state->handle = virgl_object_assign_handle();
virgl_encoder_create_vertex_elements(vctx, state->handle,
num_elements, elements);
return state;
}
static void virgl_delete_vertex_elements_state(struct pipe_context *ctx,
void *ve)
{
struct virgl_context *vctx = virgl_context(ctx);
uint32_t handle = (unsigned long)ve;
virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_VERTEX_ELEMENTS);
struct virgl_vertex_elements_state *state =
(struct virgl_vertex_elements_state *)ve;
virgl_encode_delete_object(vctx, state->handle, VIRGL_OBJECT_VERTEX_ELEMENTS);
FREE(state);
}
static void virgl_bind_vertex_elements_state(struct pipe_context *ctx,
void *ve)
{
struct virgl_context *vctx = virgl_context(ctx);
uint32_t handle = (unsigned long)ve;
virgl_encode_bind_object(vctx, handle, VIRGL_OBJECT_VERTEX_ELEMENTS);
struct virgl_vertex_elements_state *state =
(struct virgl_vertex_elements_state *)ve;
vctx->vertex_elements = state;
virgl_encode_bind_object(vctx, state ? state->handle : 0,
VIRGL_OBJECT_VERTEX_ELEMENTS);
vctx->vertex_array_dirty = TRUE;
}
static void virgl_set_vertex_buffers(struct pipe_context *ctx,
......@@ -415,7 +446,17 @@ static void virgl_hw_set_vertex_buffers(struct pipe_context *ctx)
struct virgl_context *vctx = virgl_context(ctx);
if (vctx->vertex_array_dirty) {
struct virgl_vertex_elements_state *ve = vctx->vertex_elements;
if (ve->num_bindings) {
struct pipe_vertex_buffer vertex_buffers[PIPE_MAX_ATTRIBS];
for (int i = 0; i < ve->num_bindings; ++i)
vertex_buffers[i] = vctx->vertex_buffer[ve->binding_map[i]];
virgl_encoder_set_vertex_buffers(vctx, ve->num_bindings, vertex_buffers);
} else
virgl_encoder_set_vertex_buffers(vctx, vctx->num_vertex_buffers, vctx->vertex_buffer);
virgl_attach_res_vertex_buffers(vctx);
}
}
......
......@@ -32,6 +32,7 @@ struct pipe_screen;
struct tgsi_token;
struct u_upload_mgr;
struct virgl_cmd_buf;
struct virgl_vertex_elements_state;
struct virgl_sampler_view {
struct pipe_sampler_view base;
......@@ -53,6 +54,7 @@ struct virgl_context {
struct virgl_cmd_buf *cbuf;
struct virgl_textures_info samplers[PIPE_SHADER_TYPES];
struct virgl_vertex_elements_state *vertex_elements;
struct pipe_framebuffer_state framebuffer;
......
......@@ -58,9 +58,14 @@
#include <llvm/Analysis/TargetLibraryInfo.h>
#include <clang/Basic/TargetInfo.h>
#include <clang/Frontend/CodeGenOptions.h>
#include <clang/Frontend/CompilerInstance.h>
#if HAVE_LLVM >= 0x0800
#include <clang/Basic/CodeGenOptions.h>
#else
#include <clang/Frontend/CodeGenOptions.h>
#endif
namespace clover {
namespace llvm {
namespace compat {
......