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Commits on Source (51)
......@@ -12,3 +12,6 @@ b031c643491a92a5574c7a4bd659df33f2d89bb6
# These were manually rebased by Jason, thanks!
8ab95b849e66f3221d80a67eef2ec6e3730901a8
5c30fffeec1732c21d600c036f95f8cdb1bb5487
# This doesn't actually appliy to 19.0
29179f58c6ba8099859ea25900214dbbd3814a92
\ No newline at end of file
......@@ -35,7 +35,11 @@ def main():
args = parser.parse_args()
if os.path.isabs(args.libdir):
to = os.path.join(os.environ.get('DESTDIR', '/'), args.libdir[1:])
destdir = os.environ.get('DESTDIR')
if destdir:
to = os.path.join(destdir, args.libdir[1:])
else:
to = args.libdir
else:
to = os.path.join(os.environ['MESON_INSTALL_DESTDIR_PREFIX'], args.libdir)
......@@ -45,7 +49,6 @@ def main():
if os.path.lexists(to):
os.unlink(to)
os.makedirs(to)
shutil.copy(args.megadriver, master)
for driver in args.drivers:
abs_driver = os.path.join(to, driver)
......
......@@ -32,7 +32,8 @@ Compatibility contexts may report a lower version depending on each driver.
<h2>SHA256 checksums</h2>
<pre>
TBD.
4c5b9c5227d37c1f6bdc786a6fa7ee7fbce40b2e8a87340c7d3234534ece3304 mesa-19.0.0.tar.gz
5a549dfb40ec31e5c36c47aadac04554cb2e2a8d144a046a378fc16da57e38f8 mesa-19.0.0.tar.xz
</pre>
......
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 19.0.1 Release Notes / March 27, 2019</h1>
<p>
Mesa 19.0.1 is a bug fix release which fixes bugs found since the 19.0.0 release.
</p>
<p>
Mesa 19.0.1 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
f1dd1980ed628edea3935eed7974fbc5d8353e9578c562728b880d63ac613dbd mesa-19.0.1.tar.gz
6884163c0ea9e4c98378ab8fecd72fe7b5f437713a14471beda378df247999d4 mesa-19.0.1.tar.xz
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=100316">Bug 100316</a> - Linking GLSL 1.30 shaders with invariant and deprecated variables triggers an 'mismatching invariant qualifiers' error</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107563">Bug 107563</a> - [RADV] Broken rendering in Unity demos</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109698">Bug 109698</a> - dri.pc contents invalid when built with meson</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109980">Bug 109980</a> - [i915 CI][HSW] spec&#64;arb_fragment_shader_interlock&#64;arb_fragment_shader_interlock-image-load-store - fail</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=110211">Bug 110211</a> - If DESTDIR is set to an empty string, the dri drivers are not installed</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=110221">Bug 110221</a> - build error with meson</li>
</ul>
<h2>Changes</h2>
<p>Andres Gomez (4):</p>
<ul>
<li>glsl: correctly validate component layout qualifier for dvec{3,4}</li>
<li>glsl/linker: don't fail non static used inputs without matching outputs</li>
<li>glsl/linker: simplify xfb_offset vs xfb_stride overflow check</li>
<li>Revert "glsl: relax input-&gt;output validation for SSO programs"</li>
</ul>
<p>Bas Nieuwenhuizen (2):</p>
<ul>
<li>radv: Use correct image view comparison for fast clears.</li>
<li>ac/nir: Return frag_coord as integer.</li>
</ul>
<p>Danylo Piliaiev (2):</p>
<ul>
<li>anv: Treat zero size XFB buffer as disabled</li>
<li>glsl: Cross validate variable's invariance by explicit invariance only</li>
</ul>
<p>Dave Airlie (1):</p>
<ul>
<li>softpipe: fix texture view crashes</li>
</ul>
<p>Dylan Baker (5):</p>
<ul>
<li>docs: Add SHA256 sums for 19.0.0</li>
<li>cherry-ignore: Add commit that doesn't apply</li>
<li>bin/install_megadrivers.py: Correctly handle DESTDIR=''</li>
<li>bin/install_megadrivers.py: Fix regression for set DESTDIR</li>
<li>bump version for 19.0.1</li>
</ul>
<p>Eric Anholt (1):</p>
<ul>
<li>v3d: Fix leak of the renderonly struct on screen destruction.</li>
</ul>
<p>Jason Ekstrand (6):</p>
<ul>
<li>glsl/lower_vector_derefs: Don't use a temporary for TCS outputs</li>
<li>glsl/list: Add a list variant of insert_after</li>
<li>anv/pass: Flag the need for a RT flush for resolve attachments</li>
<li>nir/builder: Add a vector extract helper</li>
<li>nir: Add a new pass to lower array dereferences on vectors</li>
<li>intel/nir: Lower array-deref-of-vector UBO and SSBO loads</li>
</ul>
<p>Józef Kucia (2):</p>
<ul>
<li>radv: Fix driverUUID</li>
<li>mesa: Fix GL_NUM_DEVICE_UUIDS_EXT</li>
</ul>
<p>Kenneth Graunke (1):</p>
<ul>
<li>intel/fs: Fix opt_peephole_csel to not throw away saturates.</li>
</ul>
<p>Kevin Strasser (1):</p>
<ul>
<li>egl/dri: Avoid out of bounds array access</li>
</ul>
<p>Mark Janes (1):</p>
<ul>
<li>mesa: properly report the length of truncated log messages</li>
</ul>
<p>Plamena Manolova (1):</p>
<ul>
<li>i965: Disable ARB_fragment_shader_interlock for platforms prior to GEN9</li>
</ul>
<p>Samuel Pitoiset (3):</p>
<ul>
<li>radv: set the maximum number of IBs per submit to 192</li>
<li>radv: always initialize HTILE when the src layout is UNDEFINED</li>
<li>radv: fix binding transform feedback buffers</li>
</ul>
<p>Sergii Romantsov (1):</p>
<ul>
<li>d3d: meson: do not prefix user provided d3d-drivers-path</li>
</ul>
<p>Tapani Pälli (2):</p>
<ul>
<li>isl: fix automake build when sse41 is not supported</li>
<li>anv/radv: release memory allocated by glsl types during spirv_to_nir</li>
</ul>
</div>
</body>
</html>
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 19.0.2 Release Notes / April 10, 2019</h1>
<p>
Mesa 19.0.2 is a bug fix release which fixes bugs found since the 19.0.1 release.
</p>
<p>
Mesa 19.0.2 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
TBD
</pre>
<h2>New features</h2>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=108766">Bug 108766</a> - Mesa built with meson has RPATH entries</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=109648">Bug 109648</a> - AMD Raven hang during va-api decoding</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=110257">Bug 110257</a> - Major artifacts in mpeg2 vaapi hw decoding</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=110259">Bug 110259</a> - radv: Sampling depth-stencil image in GENERAL layout returns nothing but zero (regression, bisected)</li>
</ul>
<h2>Changes</h2>
<p>Boyuan Zhang (1):</p>
<ul>
<li>st/va: reverse qt matrix back to its original order</li>
</ul>
<p>Caio Marcelo de Oliveira Filho (1):</p>
<ul>
<li>nir: Take if_uses into account when repairing SSA</li>
</ul>
<p>Dylan Baker (2):</p>
<ul>
<li>docs: Add SHA256 sums for mesa 19.0.1</li>
<li>VERSION: bump version for 19.0.2</li>
</ul>
<p>Eric Anholt (3):</p>
<ul>
<li>dri3: Return the current swap interval from glXGetSwapIntervalMESA().</li>
<li>v3d: Bump the maximum texture size to 4k for V3D 4.x.</li>
<li>v3d: Don't try to use the TFU blit path if a scissor is enabled.</li>
</ul>
<p>Eric Engestrom (1):</p>
<ul>
<li>meson: strip rpath from megadrivers</li>
</ul>
<p>Jason Ekstrand (1):</p>
<ul>
<li>Revert "anv/radv: release memory allocated by glsl types during spirv_to_nir"</li>
</ul>
<p>Karol Herbst (1):</p>
<ul>
<li>nir/print: fix printing the image_array intrinsic index</li>
</ul>
<p>Leo Liu (2):</p>
<ul>
<li>radeon/vcn: add H.264 constrained baseline support</li>
<li>radeon/vcn/vp9: search the render target from the whole list</li>
</ul>
<p>Lionel Landwerlin (1):</p>
<ul>
<li>intel: add dependency on genxml generated files</li>
</ul>
<p>Marek Olšák (1):</p>
<ul>
<li>radeonsi: fix assertion failure by using the correct type</li>
</ul>
<p>Samuel Pitoiset (2):</p>
<ul>
<li>radv: skip updating depth/color metadata for conditional rendering</li>
<li>radv: do not always initialize HTILE in compressed state</li>
</ul>
</div>
</body>
</html>
......@@ -608,7 +608,7 @@ with_gallium_xa = _xa != 'false'
d3d_drivers_path = get_option('d3d-drivers-path')
if d3d_drivers_path == ''
d3d_drivers_path = join_paths(get_option('libdir'), 'd3d')
d3d_drivers_path = join_paths(get_option('prefix'), get_option('libdir'), 'd3d')
endif
with_gallium_st_nine = get_option('gallium-nine')
......
......@@ -3093,7 +3093,8 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
ctx->abi->frag_pos[2],
ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
};
result = ac_build_gather_values(&ctx->ac, values, 4);
result = ac_to_integer(&ctx->ac,
ac_build_gather_values(&ctx->ac, values, 4));
break;
}
case nir_intrinsic_load_front_face:
......
......@@ -1258,7 +1258,7 @@ radv_set_ds_clear_metadata(struct radv_cmd_buffer *cmd_buffer,
if (aspects & VK_IMAGE_ASPECT_DEPTH_BIT)
++reg_count;
radeon_emit(cs, PKT3(PKT3_WRITE_DATA, 2 + reg_count, 0));
radeon_emit(cs, PKT3(PKT3_WRITE_DATA, 2 + reg_count, cmd_buffer->state.predicating));
radeon_emit(cs, S_370_DST_SEL(V_370_MEM) |
S_370_WR_CONFIRM(1) |
S_370_ENGINE_SEL(V_370_PFP));
......@@ -1282,7 +1282,7 @@ radv_set_tc_compat_zrange_metadata(struct radv_cmd_buffer *cmd_buffer,
uint64_t va = radv_buffer_get_va(image->bo);
va += image->offset + image->tc_compat_zrange_offset;
radeon_emit(cs, PKT3(PKT3_WRITE_DATA, 3, 0));
radeon_emit(cs, PKT3(PKT3_WRITE_DATA, 3, cmd_buffer->state.predicating));
radeon_emit(cs, S_370_DST_SEL(V_370_MEM) |
S_370_WR_CONFIRM(1) |
S_370_ENGINE_SEL(V_370_PFP));
......@@ -1476,7 +1476,7 @@ radv_set_color_clear_metadata(struct radv_cmd_buffer *cmd_buffer,
assert(radv_image_has_cmask(image) || radv_image_has_dcc(image));
radeon_emit(cs, PKT3(PKT3_WRITE_DATA, 4, 0));
radeon_emit(cs, PKT3(PKT3_WRITE_DATA, 4, cmd_buffer->state.predicating));
radeon_emit(cs, S_370_DST_SEL(V_370_MEM) |
S_370_WR_CONFIRM(1) |
S_370_ENGINE_SEL(V_370_PFP));
......@@ -4406,10 +4406,15 @@ static void radv_handle_depth_image_transition(struct radv_cmd_buffer *cmd_buffe
if (!radv_image_has_htile(image))
return;
if (src_layout == VK_IMAGE_LAYOUT_UNDEFINED &&
radv_layout_has_htile(image, dst_layout, dst_queue_mask)) {
/* TODO: merge with the clear if applicable */
radv_initialize_htile(cmd_buffer, image, range, 0);
if (src_layout == VK_IMAGE_LAYOUT_UNDEFINED) {
uint32_t clear_value = vk_format_is_stencil(image->vk_format) ? 0xfffff30f : 0xfffc000f;
if (radv_layout_is_htile_compressed(image, dst_layout,
dst_queue_mask)) {
clear_value = 0;
}
radv_initialize_htile(cmd_buffer, image, range, clear_value);
} else if (!radv_layout_is_htile_compressed(image, src_layout, src_queue_mask) &&
radv_layout_is_htile_compressed(image, dst_layout, dst_queue_mask)) {
uint32_t clear_value = vk_format_is_stencil(image->vk_format) ? 0xfffff30f : 0xfffc000f;
......@@ -4906,7 +4911,7 @@ void radv_CmdBindTransformFeedbackBuffersEXT(
enabled_mask |= 1 << idx;
}
cmd_buffer->state.streamout.enabled_mask = enabled_mask;
cmd_buffer->state.streamout.enabled_mask |= enabled_mask;
cmd_buffer->state.dirty |= RADV_CMD_DIRTY_STREAMOUT_BUFFER;
}
......
......@@ -337,7 +337,7 @@ radv_physical_device_init(struct radv_physical_device *device,
device->rad_info.chip_class > GFX9)
fprintf(stderr, "WARNING: radv is not a conformant vulkan implementation, testing use only.\n");
radv_get_driver_uuid(&device->device_uuid);
radv_get_driver_uuid(&device->driver_uuid);
radv_get_device_uuid(&device->rad_info, &device->device_uuid);
if (device->rad_info.family == CHIP_STONEY ||
......@@ -2794,7 +2794,7 @@ VkResult radv_QueueSubmit(
struct radeon_winsys_fence *base_fence = fence ? fence->fence : NULL;
struct radeon_winsys_ctx *ctx = queue->hw_ctx;
int ret;
uint32_t max_cs_submission = queue->device->trace_bo ? 1 : UINT32_MAX;
uint32_t max_cs_submission = queue->device->trace_bo ? 1 : RADV_MAX_IBS_PER_SUBMIT;
uint32_t scratch_size = 0;
uint32_t compute_scratch_size = 0;
uint32_t esgs_ring_size = 0, gsvs_ring_size = 0;
......
......@@ -651,7 +651,7 @@ static bool depth_view_can_fast_clear(struct radv_cmd_buffer *cmd_buffer,
iview->base_mip == 0 &&
iview->base_layer == 0 &&
radv_layout_is_htile_compressed(iview->image, layout, queue_mask) &&
!radv_image_extent_compare(iview->image, &iview->extent))
radv_image_extent_compare(iview->image, &iview->extent))
return true;
return false;
}
......
......@@ -29,6 +29,13 @@
#ifndef RADV_AMDGPU_WINSYS_PUBLIC_H
#define RADV_AMDGPU_WINSYS_PUBLIC_H
/* The number of IBs per submit isn't infinite, it depends on the ring type
* (ie. some initial setup needed for a submit) and the number of IBs (4 DW).
* This limit is arbitrary but should be safe for now. Ideally, we should get
* this limit from the KMD.
*/
#define RADV_MAX_IBS_PER_SUBMIT 192
struct radeon_winsys *radv_amdgpu_winsys_create(int fd, uint64_t debug_flags,
uint64_t perftest_flags);
......
......@@ -820,8 +820,8 @@
<packet code="120" name="Tile Binning Mode Cfg" min_ver="41">
<field name="Height (in pixels)" size="12" start="48" type="uint" minus_one="true"/>
<field name="Width (in pixels)" size="12" start="32" type="uint" minus_one="true"/>
<field name="Height (in pixels)" size="16" start="48" type="uint" minus_one="true"/>
<field name="Width (in pixels)" size="16" start="32" type="uint" minus_one="true"/>
<field name="Double-buffer in non-ms mode" size="1" start="15" type="bool"/>
<field name="Multisample Mode (4x)" size="1" start="14" type="bool"/>
......
......@@ -32,7 +32,8 @@
*/
#define V3D_MAX_TEXTURE_SAMPLERS 16
#define V3D_MAX_MIP_LEVELS 12
/* The HW can do 16384 (15), but we run into hangs when we expose that. */
#define V3D_MAX_MIP_LEVELS 13
#define V3D_MAX_SAMPLES 4
......
......@@ -229,6 +229,7 @@ NIR_FILES = \
nir/nir_lower_alpha_test.c \
nir/nir_lower_alu.c \
nir/nir_lower_alu_to_scalar.c \
nir/nir_lower_array_deref_of_vec.c \
nir/nir_lower_atomics_to_ssbo.c \
nir/nir_lower_bitmap.c \
nir/nir_lower_bit_size.c \
......
......@@ -3698,6 +3698,10 @@ apply_layout_qualifier_to_variable(const struct ast_type_qualifier *qual,
"cannot be applied to a matrix, a structure, "
"a block, or an array containing any of "
"these.");
} else if (components > 4 && type->is_64bit()) {
_mesa_glsl_error(loc, state, "component layout qualifier "
"cannot be applied to dvec%u.",
components / 2);
} else if (qual_component != 0 &&
(qual_component + components - 1) > 3) {
_mesa_glsl_error(loc, state, "component overflow (%u > 3)",
......@@ -3940,7 +3944,8 @@ apply_type_qualifier_to_variable(const struct ast_type_qualifier *qual,
"`invariant' after being used",
var->name);
} else {
var->data.invariant = 1;
var->data.explicit_invariant = true;
var->data.invariant = true;
}
}
......@@ -4148,8 +4153,10 @@ apply_type_qualifier_to_variable(const struct ast_type_qualifier *qual,
}
}
if (state->all_invariant && var->data.mode == ir_var_shader_out)
if (state->all_invariant && var->data.mode == ir_var_shader_out) {
var->data.explicit_invariant = true;
var->data.invariant = true;
}
var->data.interpolation =
interpret_interpolation_qualifier(qual, var->type,
......@@ -4857,6 +4864,7 @@ ast_declarator_list::hir(exec_list *instructions,
"`invariant' after being used",
earlier->name);
} else {
earlier->data.explicit_invariant = true;
earlier->data.invariant = true;
}
}
......
......@@ -1734,6 +1734,7 @@ ir_variable::ir_variable(const struct glsl_type *type, const char *name,
this->data.centroid = false;
this->data.sample = false;
this->data.patch = false;
this->data.explicit_invariant = false;
this->data.invariant = false;
this->data.how_declared = ir_var_declared_normally;
this->data.mode = mode;
......
......@@ -657,6 +657,19 @@ public:
unsigned centroid:1;
unsigned sample:1;
unsigned patch:1;
/**
* Was an 'invariant' qualifier explicitly set in the shader?
*
* This is used to cross validate qualifiers.
*/
unsigned explicit_invariant:1;
/**
* Is the variable invariant?
*
* It can happen either by having the 'invariant' qualifier
* explicitly set in the shader or by being used in calculations
* of other invariant variables.
*/
unsigned invariant:1;
unsigned precise:1;
......
......@@ -199,6 +199,7 @@ void ir_print_visitor::visit(ir_variable *ir)
const char *const samp = (ir->data.sample) ? "sample " : "";
const char *const patc = (ir->data.patch) ? "patch " : "";
const char *const inv = (ir->data.invariant) ? "invariant " : "";
const char *const explicit_inv = (ir->data.explicit_invariant) ? "explicit_invariant " : "";
const char *const prec = (ir->data.precise) ? "precise " : "";
const char *const bindless = (ir->data.bindless) ? "bindless " : "";
const char *const bound = (ir->data.bound) ? "bound " : "";
......@@ -215,11 +216,11 @@ void ir_print_visitor::visit(ir_variable *ir)
const char *const interp[] = { "", "smooth", "flat", "noperspective" };
STATIC_ASSERT(ARRAY_SIZE(interp) == INTERP_MODE_COUNT);
fprintf(f, "(%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s) ",
fprintf(f, "(%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s) ",
binding, loc, component, cent, bindless, bound,
image_format, memory_read_only, memory_write_only,
memory_coherent, memory_volatile, memory_restrict,
samp, patc, inv, prec, mode[ir->data.mode],
samp, patc, inv, explicit_inv, prec, mode[ir->data.mode],
stream,
interp[ir->data.interpolation]);
......
......@@ -419,8 +419,10 @@ ir_reader::read_declaration(s_expression *expr)
var->data.sample = 1;
} else if (strcmp(qualifier->value(), "patch") == 0) {
var->data.patch = 1;
} else if (strcmp(qualifier->value(), "explicit_invariant") == 0) {
var->data.explicit_invariant = true;
} else if (strcmp(qualifier->value(), "invariant") == 0) {
var->data.invariant = 1;
var->data.invariant = true;
} else if (strcmp(qualifier->value(), "uniform") == 0) {
var->data.mode = ir_var_uniform;
} else if (strcmp(qualifier->value(), "shader_storage") == 0) {
......