Skip to content
Commits on Source (63)
Show whitespace changes
Inline Side-by-side
bin/.cherry-ignore
View file @ 3c8c851f
......@@ -9,3 +9,7 @@ a72dbc461bdb7714656e62cd8f4b00a404c2e6e0 mesa: allow GL_UNSIGNED_BYTE type for S
c9f54486959716762e6818dabb0a73a8cd46df67 radeonsi: fix regression in indirect input swizzles.
# extra: Just some comments update.
2ad9917e187c1e9dbb053d3c98aa0e39fa374059 anv/blorp: Fix a comment as per Nanley's review feedback
# fixes: This commit was immediately reverted by commit 2dce1175c1c.
4aec44c0d9c4c0649c362199fac97efe0a3b38a4 i965/tools: 32bit compilation with meson
# pick: This commit was reverted by commit 95bb7d82ca8.
90819abb56f6b1a0cd4946b13b6caf24fb46e500 radv: fix descriptor pool allocation size
docs/relnotes/18.2.0.html
View file @ 3c8c851f
......@@ -40,7 +40,8 @@ an up-to-date version of Wayland to keep the functionality.
<h2>SHA256 checksums</h2>
<pre>
TBD.
b9e6bb3eb7660b0726ba28405ffa0cb77de619e925b910b72f4d7a85c0098596 mesa-18.2.0.tar.gz
22452bdffff8e11bf4284278155a9f77cb28d6d73a12c507f1490732d0d9ddce mesa-18.2.0.tar.xz
</pre>
......
docs/relnotes/18.2.1.html 0 → 100644
View file @ 3c8c851f
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html lang="en">
<head>
<meta http-equiv="content-type" content="text/html; charset=utf-8">
<title>Mesa Release Notes</title>
<link rel="stylesheet" type="text/css" href="../mesa.css">
</head>
<body>
<div class="header">
<h1>The Mesa 3D Graphics Library</h1>
</div>
<iframe src="../contents.html"></iframe>
<div class="content">
<h1>Mesa 18.2.1 Release Notes / September 21, 2018</h1>
<p>
Mesa 18.2.1 is a bug fix release which fixes bugs found since the 18.2.0 release.
</p>
<p>
Mesa 18.2.0 implements the OpenGL 4.5 API, but the version reported by
glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
Some drivers don't support all the features required in OpenGL 4.5. OpenGL
4.5 is <strong>only</strong> available if requested at context creation.
Compatibility contexts may report a lower version depending on each driver.
</p>
<h2>SHA256 checksums</h2>
<pre>
TBD
</pre>
<h2>New features</h2>
<p>None</p>
<h2>Bug fixes</h2>
<ul>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=103241">Bug 103241</a> - Anv crashes when using 64-bit vertex inputs</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107280">Bug 107280</a> - [DXVK] Batman: Arkham City with tessellation enabled hangs on SKL GT4</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107772">Bug 107772</a> - Mesa preprocessor matches if(def)s &amp; endifs incorrectly</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107779">Bug 107779</a> - Access violation with some games</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107810">Bug 107810</a> - The 'va_end' call is missed after 'va_copy' in 'util_vsnprintf' function under windows</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107832">Bug 107832</a> - Gallium picking A16L16 formats when emulating INTENSITY16 conflicts with mesa</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107843">Bug 107843</a> - 32bit Mesa build failes with meson.</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107879">Bug 107879</a> - crash happens when link program</li>
<li><a href="https://bugs.freedesktop.org/show_bug.cgi?id=107891">Bug 107891</a> - [wine, regression, bisected] RAGE, Wolfenstein The New Order hangs in menu</li>
</ul>
<h2>Changes</h2>
<p>Andres Gomez (3):</p>
<ul>
<li>docs: add sha256 checksums for 18.2.0</li>
<li>Revert "Revert "glsl: skip stringification in preprocessor if in unreachable branch""</li>
<li>cherry-ignore: i965/tools: 32bit compilation with meson</li>
</ul>
<p>Andrii Simiklit (4):</p>
<ul>
<li>apple/glx/log: added missing va_end() after va_copy()</li>
<li>mesa/util: don't use the same 'va_list' instance twice</li>
<li>mesa/util: don't ignore NULL returned from 'malloc'</li>
<li>mesa/util: add missing va_end() after va_copy()</li>
</ul>
<p>Bas Nieuwenhuizen (5):</p>
<ul>
<li>radv: Support v3 of VK_EXT_vertex_attribute_divisor.</li>
<li>radv: Set the user SGPR MSB for Vega.</li>
<li>radv: Only allow 16 user SGPRs for compute on GFX9+.</li>
<li>radv: Use build ID if available for cache UUID.</li>
<li>radv: Fix driver UUID SHA1 init.</li>
</ul>
<p>Christopher Egert (1):</p>
<ul>
<li>radeon: fix ColorMask</li>
</ul>
<p>Dave Airlie (1):</p>
<ul>
<li>virgl: don't send a shader create with no data. (v2)</li>
</ul>
<p>Dylan Baker (1):</p>
<ul>
<li>meson: Print a message about why a libdrm version was selected</li>
</ul>
<p>Eric Anholt (2):</p>
<ul>
<li>v3d: Fix SRC_ALPHA_SATURATE blending for RTs without alpha.</li>
<li>v3d: Fix setup of the VCM cache size.</li>
</ul>
<p>Erik Faye-Lund (2):</p>
<ul>
<li>winsys/virgl: avoid unintended behavior</li>
<li>virgl: adjust strides when mapping temp-resources</li>
</ul>
<p>Fritz Koenig (2):</p>
<ul>
<li>mesa: Additional FlipY applications</li>
<li>mesa: FramebufferParameteri parameter checking</li>
</ul>
<p>Gert Wollny (2):</p>
<ul>
<li>winsys/virgl: correct resource and handle allocation (v2)</li>
<li>mesa/texture: Also check for LA texture when querying intensity component size</li>
</ul>
<p>Ian Romanick (1):</p>
<ul>
<li>i965/fs: Don't propagate conditional modifiers from integer compares to adds</li>
</ul>
<p>Jason Ekstrand (11):</p>
<ul>
<li>anv/pipeline: Only consider double elements which actually exist</li>
<li>i965: Workaround the gen9 hw astc5x5 sampler bug</li>
<li>anv: Re-emit vertex buffers when the pipeline changes</li>
<li>anv: Disable the vertex cache when tessellating on SKL GT4</li>
<li>anv: Clamp scissors to the framebuffer boundary</li>
<li>vulkan: Update the XML and headers to 1.1.84</li>
<li>anv: Support v3 of VK_EXT_vertex_attribute_divisor</li>
<li>anv/query: Write both dwords in emit_zero_queries</li>
<li>nir: Add a small pass to rematerialize derefs per-block</li>
<li>nir/loop_unroll: Re-materialize derefs in use blocks before unrolling</li>
<li>nir/opt_if: Re-materialize derefs in use blocks before peeling loops</li>
</ul>
<p>Josh Pieper (1):</p>
<ul>
<li>st/mesa: Validate the result of pipe_transfer_map in make_texture (v2)</li>
</ul>
<p>Juan A. Suarez Romero (2):</p>
<ul>
<li>cherry-ignore: radv: fix descriptor pool allocation size</li>
<li>Update version to 18.2.1</li>
</ul>
<p>Kenneth Feng (1):</p>
<ul>
<li>amd: Add Picasso device id</li>
</ul>
<p>Marek Olšák (5):</p>
<ul>
<li>radeonsi: fix HTILE for NPOT textures with mipmapping on SI/CI</li>
<li>winsys/radeon: fix CMASK fast clear for NPOT textures with mipmapping on SI/CI</li>
<li>r600: fix HTILE for NPOT textures with mipmapping</li>
<li>radeonsi: fix printing a BO list into ddebug reports</li>
<li>ac: revert new LLVM 7.0 behavior for fdiv</li>
</ul>
<p>Mathias Fröhlich (1):</p>
<ul>
<li>tnl: Fix green gun regression in xonotic.</li>
</ul>
<p>Mauro Rossi (3):</p>
<ul>
<li>android: broadcom/genxml: fix collision with intel/genxml header-gen macro</li>
<li>android: broadcom/cle: add gallium include path</li>
<li>android: broadcom/cle: export the broadcom top level path headers</li>
</ul>
<p>Michel Dänzer (1):</p>
<ul>
<li>loader/dri3: Only wait for back buffer fences in dri3_get_buffer</li>
</ul>
<p>Pierre Moreau (1):</p>
<ul>
<li>nvir: Always split 64-bit IMAD/IMUL operations</li>
</ul>
<p>Samuel Pitoiset (7):</p>
<ul>
<li>radv: fix function names for VK_EXT_conditional_rendering</li>
<li>radv: fix VK_EXT_conditional_rendering visibility</li>
<li>radv: bump the maximum number of arguments to 64</li>
<li>radv: handle loc-&gt;indirect correctly for the first descriptor</li>
<li>radv: fix GPU hangs with 32-bit indirect descriptors</li>
<li>radv: fix flushing indirect descriptors</li>
<li>radv: fix setting global locations for indirect descriptors</li>
</ul>
<p>Sergii Romantsov (3):</p>
<ul>
<li>intel: compiler option msse2 and mstackrealign</li>
<li>i965/tools: 32bit compilation with meson</li>
<li>mesa/meson: 32bit xmlconfig linkage</li>
</ul>
<p>Timothy Arceri (2):</p>
<ul>
<li>glsl: fixer lexer for unreachable defines</li>
<li>Revert "radeonsi: avoid syncing the driver thread in si_fence_finish"</li>
</ul>
</div>
</body>
</html>
include/pci_ids/radeonsi_pci_ids.h
View file @ 3c8c851f
......@@ -243,3 +243,4 @@ CHIPSET(0x66A7, VEGA20)
CHIPSET(0x66AF, VEGA20)
CHIPSET(0x15DD, RAVEN)
CHIPSET(0x15D8, RAVEN)
include/vulkan/vulkan_core.h
View file @ 3c8c851f
......@@ -43,7 +43,7 @@ extern "C" {
#define VK_VERSION_MINOR(version) (((uint32_t)(version) >> 12) & 0x3ff)
#define VK_VERSION_PATCH(version) ((uint32_t)(version) & 0xfff)
// Version of this file
#define VK_HEADER_VERSION 80
#define VK_HEADER_VERSION 84
#define VK_NULL_HANDLE 0
......@@ -305,6 +305,8 @@ typedef enum VkStructureType {
VK_STRUCTURE_TYPE_WIN32_KEYED_MUTEX_ACQUIRE_RELEASE_INFO_NV = 1000058000,
VK_STRUCTURE_TYPE_VALIDATION_FLAGS_EXT = 1000061000,
VK_STRUCTURE_TYPE_VI_SURFACE_CREATE_INFO_NN = 1000062000,
VK_STRUCTURE_TYPE_IMAGE_VIEW_ASTC_DECODE_MODE_EXT = 1000067000,
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_ASTC_DECODE_FEATURES_EXT = 1000067001,
VK_STRUCTURE_TYPE_IMPORT_MEMORY_WIN32_HANDLE_INFO_KHR = 1000073000,
VK_STRUCTURE_TYPE_EXPORT_MEMORY_WIN32_HANDLE_INFO_KHR = 1000073001,
VK_STRUCTURE_TYPE_MEMORY_WIN32_HANDLE_PROPERTIES_KHR = 1000073002,
......@@ -380,6 +382,10 @@ typedef enum VkStructureType {
VK_STRUCTURE_TYPE_EXTERNAL_FORMAT_ANDROID = 1000129005,
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SAMPLER_FILTER_MINMAX_PROPERTIES_EXT = 1000130000,
VK_STRUCTURE_TYPE_SAMPLER_REDUCTION_MODE_CREATE_INFO_EXT = 1000130001,
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_INLINE_UNIFORM_BLOCK_FEATURES_EXT = 1000138000,
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_INLINE_UNIFORM_BLOCK_PROPERTIES_EXT = 1000138001,
VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET_INLINE_UNIFORM_BLOCK_EXT = 1000138002,
VK_STRUCTURE_TYPE_DESCRIPTOR_POOL_INLINE_UNIFORM_BLOCK_CREATE_INFO_EXT = 1000138003,
VK_STRUCTURE_TYPE_SAMPLE_LOCATIONS_INFO_EXT = 1000143000,
VK_STRUCTURE_TYPE_RENDER_PASS_SAMPLE_LOCATIONS_BEGIN_INFO_EXT = 1000143001,
VK_STRUCTURE_TYPE_PIPELINE_SAMPLE_LOCATIONS_STATE_CREATE_INFO_EXT = 1000143002,
......@@ -406,6 +412,11 @@ typedef enum VkStructureType {
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_CORE_PROPERTIES_AMD = 1000185000,
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VERTEX_ATTRIBUTE_DIVISOR_PROPERTIES_EXT = 1000190000,
VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_DIVISOR_STATE_CREATE_INFO_EXT = 1000190001,
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VERTEX_ATTRIBUTE_DIVISOR_FEATURES_EXT = 1000190002,
VK_STRUCTURE_TYPE_CHECKPOINT_DATA_NV = 1000206000,
VK_STRUCTURE_TYPE_QUEUE_FAMILY_CHECKPOINT_PROPERTIES_NV = 1000206001,
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_MEMORY_MODEL_FEATURES_KHR = 1000211000,
VK_STRUCTURE_TYPE_DEBUG_REPORT_CREATE_INFO_EXT = VK_STRUCTURE_TYPE_DEBUG_REPORT_CALLBACK_CREATE_INFO_EXT,
VK_STRUCTURE_TYPE_RENDER_PASS_MULTIVIEW_CREATE_INFO_KHR = VK_STRUCTURE_TYPE_RENDER_PASS_MULTIVIEW_CREATE_INFO,
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTIVIEW_FEATURES_KHR = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTIVIEW_FEATURES,
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTIVIEW_PROPERTIES_KHR = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTIVIEW_PROPERTIES,
......@@ -440,6 +451,7 @@ typedef enum VkStructureType {
VK_STRUCTURE_TYPE_EXPORT_SEMAPHORE_CREATE_INFO_KHR = VK_STRUCTURE_TYPE_EXPORT_SEMAPHORE_CREATE_INFO,
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_16BIT_STORAGE_FEATURES_KHR = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_16BIT_STORAGE_FEATURES,
VK_STRUCTURE_TYPE_DESCRIPTOR_UPDATE_TEMPLATE_CREATE_INFO_KHR = VK_STRUCTURE_TYPE_DESCRIPTOR_UPDATE_TEMPLATE_CREATE_INFO,
VK_STRUCTURE_TYPE_SURFACE_CAPABILITIES2_EXT = VK_STRUCTURE_TYPE_SURFACE_CAPABILITIES_2_EXT,
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_EXTERNAL_FENCE_INFO_KHR = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_EXTERNAL_FENCE_INFO,
VK_STRUCTURE_TYPE_EXTERNAL_FENCE_PROPERTIES_KHR = VK_STRUCTURE_TYPE_EXTERNAL_FENCE_PROPERTIES,
VK_STRUCTURE_TYPE_EXPORT_FENCE_CREATE_INFO_KHR = VK_STRUCTURE_TYPE_EXPORT_FENCE_CREATE_INFO,
......@@ -1118,6 +1130,7 @@ typedef enum VkDescriptorType {
VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC = 8,
VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC = 9,
VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT = 10,
VK_DESCRIPTOR_TYPE_INLINE_UNIFORM_BLOCK_EXT = 1000138000,
VK_DESCRIPTOR_TYPE_BEGIN_RANGE = VK_DESCRIPTOR_TYPE_SAMPLER,
VK_DESCRIPTOR_TYPE_END_RANGE = VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT,
VK_DESCRIPTOR_TYPE_RANGE_SIZE = (VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT - VK_DESCRIPTOR_TYPE_SAMPLER + 1),
......@@ -4573,7 +4586,6 @@ VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkSurfaceKHR)
#define VK_KHR_SURFACE_SPEC_VERSION 25
#define VK_KHR_SURFACE_EXTENSION_NAME "VK_KHR_surface"
#define VK_COLORSPACE_SRGB_NONLINEAR_KHR VK_COLOR_SPACE_SRGB_NONLINEAR_KHR
typedef enum VkColorSpaceKHR {
......@@ -4592,6 +4604,7 @@ typedef enum VkColorSpaceKHR {
VK_COLOR_SPACE_ADOBERGB_NONLINEAR_EXT = 1000104012,
VK_COLOR_SPACE_PASS_THROUGH_EXT = 1000104013,
VK_COLOR_SPACE_EXTENDED_SRGB_NONLINEAR_EXT = 1000104014,
VK_COLORSPACE_SRGB_NONLINEAR_KHR = VK_COLOR_SPACE_SRGB_NONLINEAR_KHR,
VK_COLOR_SPACE_BEGIN_RANGE_KHR = VK_COLOR_SPACE_SRGB_NONLINEAR_KHR,
VK_COLOR_SPACE_END_RANGE_KHR = VK_COLOR_SPACE_SRGB_NONLINEAR_KHR,
VK_COLOR_SPACE_RANGE_SIZE_KHR = (VK_COLOR_SPACE_SRGB_NONLINEAR_KHR - VK_COLOR_SPACE_SRGB_NONLINEAR_KHR + 1),
......@@ -5979,13 +5992,24 @@ typedef struct VkPhysicalDevice8BitStorageFeaturesKHR {
#define VK_KHR_vulkan_memory_model 1
#define VK_KHR_VULKAN_MEMORY_MODEL_SPEC_VERSION 2
#define VK_KHR_VULKAN_MEMORY_MODEL_EXTENSION_NAME "VK_KHR_vulkan_memory_model"
typedef struct VkPhysicalDeviceVulkanMemoryModelFeaturesKHR {
VkStructureType sType;
void* pNext;
VkBool32 vulkanMemoryModel;
VkBool32 vulkanMemoryModelDeviceScope;
} VkPhysicalDeviceVulkanMemoryModelFeaturesKHR;
#define VK_EXT_debug_report 1
VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkDebugReportCallbackEXT)
#define VK_EXT_DEBUG_REPORT_SPEC_VERSION 9
#define VK_EXT_DEBUG_REPORT_EXTENSION_NAME "VK_EXT_debug_report"
#define VK_STRUCTURE_TYPE_DEBUG_REPORT_CREATE_INFO_EXT VK_STRUCTURE_TYPE_DEBUG_REPORT_CALLBACK_CREATE_INFO_EXT
#define VK_DEBUG_REPORT_OBJECT_TYPE_DEBUG_REPORT_EXT VK_DEBUG_REPORT_OBJECT_TYPE_DEBUG_REPORT_CALLBACK_EXT_EXT
typedef enum VkDebugReportObjectTypeEXT {
......@@ -6025,6 +6049,8 @@ typedef enum VkDebugReportObjectTypeEXT {
VK_DEBUG_REPORT_OBJECT_TYPE_VALIDATION_CACHE_EXT_EXT = 33,
VK_DEBUG_REPORT_OBJECT_TYPE_SAMPLER_YCBCR_CONVERSION_EXT = 1000156000,
VK_DEBUG_REPORT_OBJECT_TYPE_DESCRIPTOR_UPDATE_TEMPLATE_EXT = 1000085000,
VK_DEBUG_REPORT_OBJECT_TYPE_DEBUG_REPORT_EXT = VK_DEBUG_REPORT_OBJECT_TYPE_DEBUG_REPORT_CALLBACK_EXT_EXT,
VK_DEBUG_REPORT_OBJECT_TYPE_VALIDATION_CACHE_EXT = VK_DEBUG_REPORT_OBJECT_TYPE_VALIDATION_CACHE_EXT_EXT,
VK_DEBUG_REPORT_OBJECT_TYPE_DESCRIPTOR_UPDATE_TEMPLATE_KHR_EXT = VK_DEBUG_REPORT_OBJECT_TYPE_DESCRIPTOR_UPDATE_TEMPLATE_EXT,
VK_DEBUG_REPORT_OBJECT_TYPE_SAMPLER_YCBCR_CONVERSION_KHR_EXT = VK_DEBUG_REPORT_OBJECT_TYPE_SAMPLER_YCBCR_CONVERSION_EXT,
VK_DEBUG_REPORT_OBJECT_TYPE_BEGIN_RANGE_EXT = VK_DEBUG_REPORT_OBJECT_TYPE_UNKNOWN_EXT,
......@@ -6414,7 +6440,7 @@ typedef struct VkValidationFlagsEXT {
VkStructureType sType;
const void* pNext;
uint32_t disabledValidationCheckCount;
VkValidationCheckEXT* pDisabledValidationChecks;
const VkValidationCheckEXT* pDisabledValidationChecks;
} VkValidationFlagsEXT;
......@@ -6429,6 +6455,24 @@ typedef struct VkValidationFlagsEXT {
#define VK_EXT_SHADER_SUBGROUP_VOTE_EXTENSION_NAME "VK_EXT_shader_subgroup_vote"
#define VK_EXT_astc_decode_mode 1
#define VK_EXT_ASTC_DECODE_MODE_SPEC_VERSION 1
#define VK_EXT_ASTC_DECODE_MODE_EXTENSION_NAME "VK_EXT_astc_decode_mode"
typedef struct VkImageViewASTCDecodeModeEXT {
VkStructureType sType;
const void* pNext;
VkFormat decodeMode;
} VkImageViewASTCDecodeModeEXT;
typedef struct VkPhysicalDeviceASTCDecodeFeaturesEXT {
VkStructureType sType;
void* pNext;
VkBool32 decodeModeSharedExponent;
} VkPhysicalDeviceASTCDecodeFeaturesEXT;
#define VK_EXT_conditional_rendering 1
#define VK_EXT_CONDITIONAL_RENDERING_SPEC_VERSION 1
#define VK_EXT_CONDITIONAL_RENDERING_EXTENSION_NAME "VK_EXT_conditional_rendering"
......@@ -6744,7 +6788,6 @@ VKAPI_ATTR VkResult VKAPI_CALL vkReleaseDisplayEXT(
#define VK_EXT_display_surface_counter 1
#define VK_EXT_DISPLAY_SURFACE_COUNTER_SPEC_VERSION 1
#define VK_EXT_DISPLAY_SURFACE_COUNTER_EXTENSION_NAME "VK_EXT_display_surface_counter"
#define VK_STRUCTURE_TYPE_SURFACE_CAPABILITIES2_EXT VK_STRUCTURE_TYPE_SURFACE_CAPABILITIES_2_EXT
typedef enum VkSurfaceCounterFlagBitsEXT {
......@@ -7298,6 +7341,42 @@ typedef struct VkPhysicalDeviceSamplerFilterMinmaxPropertiesEXT {
#define VK_AMD_SHADER_FRAGMENT_MASK_EXTENSION_NAME "VK_AMD_shader_fragment_mask"
#define VK_EXT_inline_uniform_block 1
#define VK_EXT_INLINE_UNIFORM_BLOCK_SPEC_VERSION 1
#define VK_EXT_INLINE_UNIFORM_BLOCK_EXTENSION_NAME "VK_EXT_inline_uniform_block"
typedef struct VkPhysicalDeviceInlineUniformBlockFeaturesEXT {
VkStructureType sType;
void* pNext;
VkBool32 inlineUniformBlock;
VkBool32 descriptorBindingInlineUniformBlockUpdateAfterBind;
} VkPhysicalDeviceInlineUniformBlockFeaturesEXT;
typedef struct VkPhysicalDeviceInlineUniformBlockPropertiesEXT {
VkStructureType sType;
void* pNext;
uint32_t maxInlineUniformBlockSize;
uint32_t maxPerStageDescriptorInlineUniformBlocks;
uint32_t maxPerStageDescriptorUpdateAfterBindInlineUniformBlocks;
uint32_t maxDescriptorSetInlineUniformBlocks;
uint32_t maxDescriptorSetUpdateAfterBindInlineUniformBlocks;
} VkPhysicalDeviceInlineUniformBlockPropertiesEXT;
typedef struct VkWriteDescriptorSetInlineUniformBlockEXT {
VkStructureType sType;
const void* pNext;
uint32_t dataSize;
const void* pData;
} VkWriteDescriptorSetInlineUniformBlockEXT;
typedef struct VkDescriptorPoolInlineUniformBlockCreateInfoEXT {
VkStructureType sType;
const void* pNext;
uint32_t maxInlineUniformBlockBindings;
} VkDescriptorPoolInlineUniformBlockCreateInfoEXT;
#define VK_EXT_shader_stencil_export 1
#define VK_EXT_SHADER_STENCIL_EXPORT_SPEC_VERSION 1
#define VK_EXT_SHADER_STENCIL_EXPORT_EXTENSION_NAME "VK_EXT_shader_stencil_export"
......@@ -7481,7 +7560,6 @@ VK_DEFINE_NON_DISPATCHABLE_HANDLE(VkValidationCacheEXT)
#define VK_EXT_VALIDATION_CACHE_SPEC_VERSION 1
#define VK_EXT_VALIDATION_CACHE_EXTENSION_NAME "VK_EXT_validation_cache"
#define VK_DEBUG_REPORT_OBJECT_TYPE_VALIDATION_CACHE_EXT VK_DEBUG_REPORT_OBJECT_TYPE_VALIDATION_CACHE_EXT_EXT
typedef enum VkValidationCacheHeaderVersionEXT {
......@@ -7732,7 +7810,7 @@ typedef struct VkPhysicalDeviceShaderCorePropertiesAMD {
#define VK_EXT_vertex_attribute_divisor 1
#define VK_EXT_VERTEX_ATTRIBUTE_DIVISOR_SPEC_VERSION 1
#define VK_EXT_VERTEX_ATTRIBUTE_DIVISOR_SPEC_VERSION 3
#define VK_EXT_VERTEX_ATTRIBUTE_DIVISOR_EXTENSION_NAME "VK_EXT_vertex_attribute_divisor"
typedef struct VkPhysicalDeviceVertexAttributeDivisorPropertiesEXT {
......@@ -7753,6 +7831,13 @@ typedef struct VkPipelineVertexInputDivisorStateCreateInfoEXT {
const VkVertexInputBindingDivisorDescriptionEXT* pVertexBindingDivisors;
} VkPipelineVertexInputDivisorStateCreateInfoEXT;
typedef struct VkPhysicalDeviceVertexAttributeDivisorFeaturesEXT {
VkStructureType sType;
void* pNext;
VkBool32 vertexAttributeInstanceRateDivisor;
VkBool32 vertexAttributeInstanceRateZeroDivisor;
} VkPhysicalDeviceVertexAttributeDivisorFeaturesEXT;
#define VK_NV_shader_subgroup_partitioned 1
......@@ -7760,6 +7845,38 @@ typedef struct VkPipelineVertexInputDivisorStateCreateInfoEXT {
#define VK_NV_SHADER_SUBGROUP_PARTITIONED_EXTENSION_NAME "VK_NV_shader_subgroup_partitioned"
#define VK_NV_device_diagnostic_checkpoints 1
#define VK_NV_DEVICE_DIAGNOSTIC_CHECKPOINTS_SPEC_VERSION 2
#define VK_NV_DEVICE_DIAGNOSTIC_CHECKPOINTS_EXTENSION_NAME "VK_NV_device_diagnostic_checkpoints"
typedef struct VkQueueFamilyCheckpointPropertiesNV {
VkStructureType sType;
void* pNext;
VkPipelineStageFlags checkpointExecutionStageMask;
} VkQueueFamilyCheckpointPropertiesNV;
typedef struct VkCheckpointDataNV {
VkStructureType sType;
void* pNext;
VkPipelineStageFlagBits stage;
void* pCheckpointMarker;
} VkCheckpointDataNV;
typedef void (VKAPI_PTR *PFN_vkCmdSetCheckpointNV)(VkCommandBuffer commandBuffer, const void* pCheckpointMarker);
typedef void (VKAPI_PTR *PFN_vkGetQueueCheckpointDataNV)(VkQueue queue, uint32_t* pCheckpointDataCount, VkCheckpointDataNV* pCheckpointData);
#ifndef VK_NO_PROTOTYPES
VKAPI_ATTR void VKAPI_CALL vkCmdSetCheckpointNV(
VkCommandBuffer commandBuffer,
const void* pCheckpointMarker);
VKAPI_ATTR void VKAPI_CALL vkGetQueueCheckpointDataNV(
VkQueue queue,
uint32_t* pCheckpointDataCount,
VkCheckpointDataNV* pCheckpointData);
#endif
#ifdef __cplusplus
}
#endif
......
meson.build
View file @ 3c8c851f
......@@ -1106,12 +1106,17 @@ endif
# Loop over the enables versions and get the highest libdrm requirement for all
# active drivers.
_drm_blame = ''
foreach d : _libdrm_checks
ver = get_variable('_drm_@0@_ver'.format(d[0]))
if d[1] and ver.version_compare('>' + _drm_ver)
_drm_ver = ver
_drm_blame = d[0]
endif
endforeach
if _drm_blame != ''
message('libdrm @0@ needed because @1@ has the highest requirement'.format(_drm_ver, _drm_blame))
endif
# Then get each libdrm module
foreach d : _libdrm_checks
......
src/amd/common/ac_llvm_build.c
View file @ 3c8c851f
......@@ -555,7 +555,14 @@ ac_build_fdiv(struct ac_llvm_context *ctx,
LLVMValueRef num,
LLVMValueRef den)
{
LLVMValueRef ret = LLVMBuildFDiv(ctx->builder, num, den, "");
/* If we do (num / den), LLVM >= 7.0 does:
* return num * v_rcp_f32(den * (fabs(den) > 0x1.0p+96f ? 0x1.0p-32f : 1.0f));
*
* If we do (num * (1 / den)), LLVM does:
* return num * v_rcp_f32(den);
*/
LLVMValueRef rcp = LLVMBuildFDiv(ctx->builder, ctx->f32_1, den, "");
LLVMValueRef ret = LLVMBuildFMul(ctx->builder, num, rcp, "");
/* Use v_rcp_f32 instead of precise division. */
if (!LLVMIsConstant(ret))
......
src/amd/vulkan/radv_cmd_buffer.c
View file @ 3c8c851f
......@@ -1657,7 +1657,8 @@ radv_flush_indirect_descriptor_sets(struct radv_cmd_buffer *cmd_buffer,
{
struct radv_descriptor_state *descriptors_state =
radv_get_descriptors_state(cmd_buffer, bind_point);
uint32_t size = MAX_SETS * 2 * 4;
uint8_t ptr_size = HAVE_32BIT_POINTERS ? 1 : 2;
uint32_t size = MAX_SETS * 4 * ptr_size;
uint32_t offset;
void *ptr;
......@@ -1666,12 +1667,13 @@ radv_flush_indirect_descriptor_sets(struct radv_cmd_buffer *cmd_buffer,
return;
for (unsigned i = 0; i < MAX_SETS; i++) {
uint32_t *uptr = ((uint32_t *)ptr) + i * 2;
uint32_t *uptr = ((uint32_t *)ptr) + i * ptr_size;
uint64_t set_va = 0;
struct radv_descriptor_set *set = descriptors_state->sets[i];
if (descriptors_state->valid & (1u << i))
set_va = set->va;
uptr[0] = set_va & 0xffffffff;
if (ptr_size == 2)
uptr[1] = set_va >> 32;
}
......@@ -1714,6 +1716,8 @@ radv_flush_descriptors(struct radv_cmd_buffer *cmd_buffer,
VK_PIPELINE_BIND_POINT_GRAPHICS;
struct radv_descriptor_state *descriptors_state =
radv_get_descriptors_state(cmd_buffer, bind_point);
struct radv_cmd_state *state = &cmd_buffer->state;
bool flush_indirect_descriptors;
if (!descriptors_state->dirty)
return;
......@@ -1721,10 +1725,14 @@ radv_flush_descriptors(struct radv_cmd_buffer *cmd_buffer,
if (descriptors_state->push_dirty)
radv_flush_push_descriptors(cmd_buffer, bind_point);
if ((cmd_buffer->state.pipeline && cmd_buffer->state.pipeline->need_indirect_descriptor_sets) ||
(cmd_buffer->state.compute_pipeline && cmd_buffer->state.compute_pipeline->need_indirect_descriptor_sets)) {
flush_indirect_descriptors =
(bind_point == VK_PIPELINE_BIND_POINT_GRAPHICS &&
state->pipeline && state->pipeline->need_indirect_descriptor_sets) ||
(bind_point == VK_PIPELINE_BIND_POINT_COMPUTE &&
state->compute_pipeline && state->compute_pipeline->need_indirect_descriptor_sets);
if (flush_indirect_descriptors)
radv_flush_indirect_descriptor_sets(cmd_buffer, bind_point);
}
MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws,
cmd_buffer->cs,
......@@ -4443,29 +4451,37 @@ void radv_CmdSetDeviceMask(VkCommandBuffer commandBuffer,
}
/* VK_EXT_conditional_rendering */
void vkCmdBeginConditionalRenderingEXT(
void radv_CmdBeginConditionalRenderingEXT(
VkCommandBuffer commandBuffer,
const VkConditionalRenderingBeginInfoEXT* pConditionalRenderingBegin)
{
RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
RADV_FROM_HANDLE(radv_buffer, buffer, pConditionalRenderingBegin->buffer);
bool inverted;
bool draw_visible = true;
uint64_t va;
va = radv_buffer_get_va(buffer->bo) + pConditionalRenderingBegin->offset;
inverted = pConditionalRenderingBegin->flags & VK_CONDITIONAL_RENDERING_INVERTED_BIT_EXT;
/* By default, if the 32-bit value at offset in buffer memory is zero,
* then the rendering commands are discarded, otherwise they are
* executed as normal. If the inverted flag is set, all commands are
* discarded if the value is non zero.
*/
if (pConditionalRenderingBegin->flags &
VK_CONDITIONAL_RENDERING_INVERTED_BIT_EXT) {
draw_visible = false;
}
/* Enable predication for this command buffer. */
si_emit_set_predication_state(cmd_buffer, inverted, va);
si_emit_set_predication_state(cmd_buffer, draw_visible, va);
cmd_buffer->state.predicating = true;
/* Store conditional rendering user info. */
cmd_buffer->state.predication_type = inverted;
cmd_buffer->state.predication_type = draw_visible;
cmd_buffer->state.predication_va = va;
}
void vkCmdEndConditionalRenderingEXT(
void radv_CmdEndConditionalRenderingEXT(
VkCommandBuffer commandBuffer)
{
RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
......
src/amd/vulkan/radv_device.c
View file @ 3c8c851f
......@@ -45,22 +45,51 @@
#include "sid.h"
#include "gfx9d.h"
#include "addrlib/gfx9/chip/gfx9_enum.h"
#include "util/build_id.h"
#include "util/debug.h"
#include "util/mesa-sha1.h"
static bool
radv_get_build_id(void *ptr, struct mesa_sha1 *ctx)
{
uint32_t timestamp;
#ifdef HAVE_DL_ITERATE_PHDR
const struct build_id_note *note = NULL;
if ((note = build_id_find_nhdr_for_addr(ptr))) {
_mesa_sha1_update(ctx, build_id_data(note), build_id_length(note));
} else
#endif
if (disk_cache_get_function_timestamp(ptr, &timestamp)) {
if (!timestamp) {
fprintf(stderr, "radv: The provided filesystem timestamp for the cache is bogus!\n");
}
_mesa_sha1_update(ctx, &timestamp, sizeof(timestamp));
} else
return false;
return true;
}
static int
radv_device_get_cache_uuid(enum radeon_family family, void *uuid)
{
uint32_t mesa_timestamp, llvm_timestamp;
uint16_t f = family;
struct mesa_sha1 ctx;
unsigned char sha1[20];
unsigned ptr_size = sizeof(void*);
memset(uuid, 0, VK_UUID_SIZE);
if (!disk_cache_get_function_timestamp(radv_device_get_cache_uuid, &mesa_timestamp) ||
!disk_cache_get_function_timestamp(LLVMInitializeAMDGPUTargetInfo, &llvm_timestamp))
_mesa_sha1_init(&ctx);
if (!radv_get_build_id(radv_device_get_cache_uuid, &ctx) ||
!radv_get_build_id(LLVMInitializeAMDGPUTargetInfo, &ctx))
return -1;
memcpy(uuid, &mesa_timestamp, 4);
memcpy((char*)uuid + 4, &llvm_timestamp, 4);
memcpy((char*)uuid + 8, &f, 2);
snprintf((char*)uuid + 10, VK_UUID_SIZE - 10, "radv%zd", sizeof(void *));
_mesa_sha1_update(&ctx, &family, sizeof(family));
_mesa_sha1_update(&ctx, &ptr_size, sizeof(ptr_size));
_mesa_sha1_final(&ctx, sha1);
memcpy(uuid, sha1, VK_UUID_SIZE);
return 0;
}
......@@ -821,6 +850,13 @@ void radv_GetPhysicalDeviceFeatures2(
features->inheritedConditionalRendering = false;
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VERTEX_ATTRIBUTE_DIVISOR_FEATURES_EXT: {
VkPhysicalDeviceVertexAttributeDivisorFeaturesEXT *features =
(VkPhysicalDeviceVertexAttributeDivisorFeaturesEXT *)ext;
features->vertexAttributeInstanceRateDivisor = VK_TRUE;
features->vertexAttributeInstanceRateZeroDivisor = VK_TRUE;
break;
}
default:
break;
}
......
src/amd/vulkan/radv_extensions.py
View file @ 3c8c851f
......@@ -105,7 +105,7 @@ EXTENSIONS = [
Extension('VK_EXT_sampler_filter_minmax', 1, 'device->rad_info.chip_class >= CIK'),
Extension('VK_EXT_shader_viewport_index_layer', 1, True),
Extension('VK_EXT_shader_stencil_export', 1, True),
Extension('VK_EXT_vertex_attribute_divisor', 2, True),
Extension('VK_EXT_vertex_attribute_divisor', 3, True),
Extension('VK_AMD_draw_indirect_count', 1, True),
Extension('VK_AMD_gcn_shader', 1, True),
Extension('VK_AMD_rasterization_order', 1, 'device->has_out_of_order_rast'),
......
src/amd/vulkan/radv_nir_to_llvm.c
View file @ 3c8c851f
......@@ -422,7 +422,7 @@ get_tcs_out_current_patch_data_offset(struct radv_shader_context *ctx)
"");
}
#define MAX_ARGS 23
#define MAX_ARGS 64
struct arg_info {
LLVMTypeRef types[MAX_ARGS];
LLVMValueRef *assign[MAX_ARGS];
......@@ -545,13 +545,12 @@ create_llvm_function(LLVMContextRef ctx, LLVMModuleRef module,
static void
set_loc(struct radv_userdata_info *ud_info, uint8_t *sgpr_idx, uint8_t num_sgprs,
uint32_t indirect_offset)
set_loc(struct radv_userdata_info *ud_info, uint8_t *sgpr_idx,
uint8_t num_sgprs, bool indirect)
{
ud_info->sgpr_idx = *sgpr_idx;
ud_info->num_sgprs = num_sgprs;
ud_info->indirect = indirect_offset > 0;
ud_info->indirect_offset = indirect_offset;
ud_info->indirect = indirect;
*sgpr_idx += num_sgprs;
}
......@@ -563,7 +562,7 @@ set_loc_shader(struct radv_shader_context *ctx, int idx, uint8_t *sgpr_idx,
&ctx->shader_info->user_sgprs_locs.shader_data[idx];
assert(ud_info);
set_loc(ud_info, sgpr_idx, num_sgprs, 0);
set_loc(ud_info, sgpr_idx, num_sgprs, false);
}
static void
......@@ -577,15 +576,16 @@ set_loc_shader_ptr(struct radv_shader_context *ctx, int idx, uint8_t *sgpr_idx)
static void
set_loc_desc(struct radv_shader_context *ctx, int idx, uint8_t *sgpr_idx,
uint32_t indirect_offset)
bool indirect)
{
struct radv_userdata_locations *locs =
&ctx->shader_info->user_sgprs_locs;
struct radv_userdata_info *ud_info = &locs->descriptor_sets[idx];
assert(ud_info);
set_loc(ud_info, sgpr_idx, HAVE_32BIT_POINTERS ? 1 : 2, indirect_offset);
if (indirect_offset == 0)
set_loc(ud_info, sgpr_idx, HAVE_32BIT_POINTERS ? 1 : 2, indirect);
if (!indirect)
locs->descriptor_sets_enabled |= 1 << idx;
}
......@@ -695,7 +695,7 @@ static void allocate_user_sgprs(struct radv_shader_context *ctx,
if (ctx->shader_info->info.loads_push_constants)
user_sgpr_count += HAVE_32BIT_POINTERS ? 1 : 2;
uint32_t available_sgprs = ctx->options->chip_class >= GFX9 ? 32 : 16;
uint32_t available_sgprs = ctx->options->chip_class >= GFX9 && stage != MESA_SHADER_COMPUTE ? 32 : 16;
uint32_t remaining_sgprs = available_sgprs - user_sgpr_count;
uint32_t num_desc_set =
util_bitcount(ctx->shader_info->info.desc_set_used_mask);
......@@ -806,7 +806,7 @@ set_global_input_locs(struct radv_shader_context *ctx, gl_shader_stage stage,
for (unsigned i = 0; i < num_sets; ++i) {
if ((ctx->shader_info->info.desc_set_used_mask & (1 << i)) &&
ctx->options->layout->set[i].layout->shader_stages & stage_mask) {
set_loc_desc(ctx, i, user_sgpr_idx, 0);
set_loc_desc(ctx, i, user_sgpr_idx, false);
} else
ctx->descriptor_sets[i] = NULL;
}
......@@ -817,7 +817,6 @@ set_global_input_locs(struct radv_shader_context *ctx, gl_shader_stage stage,
for (unsigned i = 0; i < num_sets; ++i) {
if ((ctx->shader_info->info.desc_set_used_mask & (1 << i)) &&
ctx->options->layout->set[i].layout->shader_stages & stage_mask) {
set_loc_desc(ctx, i, user_sgpr_idx, i * 8);
ctx->descriptor_sets[i] =
ac_build_load_to_sgpr(&ctx->ac,
desc_sets,
......
src/amd/vulkan/radv_shader.c
View file @ 3c8c851f
......@@ -409,6 +409,7 @@ radv_fill_shader_variant(struct radv_device *device,
variant->code_size = radv_get_shader_binary_size(binary);
variant->rsrc2 = S_00B12C_USER_SGPR(variant->info.num_user_sgprs) |
S_00B12C_USER_SGPR_MSB(variant->info.num_user_sgprs >> 5) |
S_00B12C_SCRATCH_EN(scratch_enabled);
variant->rsrc1 = S_00B848_VGPRS((variant->config.num_vgprs - 1) / 4) |
......
src/amd/vulkan/radv_shader.h
View file @ 3c8c851f
......@@ -192,7 +192,6 @@ struct radv_userdata_info {
int8_t sgpr_idx;
uint8_t num_sgprs;
bool indirect;
uint32_t indirect_offset;
};
struct radv_userdata_locations {
......
src/broadcom/Android.cle.mk
View file @ 3c8c851f
......@@ -29,6 +29,10 @@ LOCAL_SRC_FILES := $(BROADCOM_DECODER_FILES)
LOCAL_STATIC_LIBRARIES := libmesa_broadcom_genxml
LOCAL_C_INCLUDES += $(MESA_TOP)/src/gallium/include
LOCAL_EXPORT_C_INCLUDE_DIRS := $(LOCAL_PATH)
LOCAL_SHARED_LIBRARIES := libexpat libz
include $(MESA_COMMON_MK)
......
src/broadcom/Android.genxml.mk
View file @ 3c8c851f
......@@ -39,7 +39,7 @@ $(intermediates)/dummy.c:
# This is the list of auto-generated files headers
LOCAL_GENERATED_SOURCES += $(addprefix $(intermediates)/broadcom/, $(BROADCOM_GENXML_GENERATED_FILES))
define header-gen
define pack-header-gen
@mkdir -p $(dir $@)
@echo "Gen Header: $(PRIVATE_MODULE) <= $(notdir $(@))"
$(hide) $(PRIVATE_SCRIPT) $(PRIVATE_SCRIPT_FLAGS) $(PRIVATE_XML) $(PRIVATE_VER) > $@
......@@ -49,25 +49,25 @@ $(intermediates)/broadcom/cle/v3d_packet_v21_pack.h: PRIVATE_SCRIPT := $(MESA_PY
$(intermediates)/broadcom/cle/v3d_packet_v21_pack.h: PRIVATE_XML := $(LOCAL_PATH)/cle/v3d_packet_v21.xml
$(intermediates)/broadcom/cle/v3d_packet_v21_pack.h: PRIVATE_VER := 21
$(intermediates)/broadcom/cle/v3d_packet_v21_pack.h: $(LOCAL_PATH)/cle/v3d_packet_v21.xml $(LOCAL_PATH)/cle/gen_pack_header.py
$(call header-gen)
$(call pack-header-gen)
$(intermediates)/broadcom/cle/v3d_packet_v33_pack.h: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(LOCAL_PATH)/cle/gen_pack_header.py
$(intermediates)/broadcom/cle/v3d_packet_v33_pack.h: PRIVATE_XML := $(LOCAL_PATH)/cle/v3d_packet_v33.xml
$(intermediates)/broadcom/cle/v3d_packet_v33_pack.h: PRIVATE_VER := 33
$(intermediates)/broadcom/cle/v3d_packet_v33_pack.h: $(LOCAL_PATH)/cle/v3d_packet_v33.xml $(LOCAL_PATH)/cle/gen_pack_header.py
$(call header-gen)
$(call pack-header-gen)
$(intermediates)/broadcom/cle/v3d_packet_v41_pack.h: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(LOCAL_PATH)/cle/gen_pack_header.py
$(intermediates)/broadcom/cle/v3d_packet_v41_pack.h: PRIVATE_XML := $(LOCAL_PATH)/cle/v3d_packet_v33.xml
$(intermediates)/broadcom/cle/v3d_packet_v41_pack.h: PRIVATE_VER := 41
$(intermediates)/broadcom/cle/v3d_packet_v41_pack.h: $(LOCAL_PATH)/cle/v3d_packet_v33.xml $(LOCAL_PATH)/cle/gen_pack_header.py
$(call header-gen)
$(call pack-header-gen)
$(intermediates)/broadcom/cle/v3d_packet_v42_pack.h: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(LOCAL_PATH)/cle/gen_pack_header.py
$(intermediates)/broadcom/cle/v3d_packet_v42_pack.h: PRIVATE_XML := $(LOCAL_PATH)/cle/v3d_packet_v33.xml
$(intermediates)/broadcom/cle/v3d_packet_v42_pack.h: PRIVATE_VER := 42
$(intermediates)/broadcom/cle/v3d_packet_v42_pack.h: $(LOCAL_PATH)/cle/v3d_packet_v33.xml $(LOCAL_PATH)/cle/gen_pack_header.py
$(call header-gen)
$(call pack-header-gen)
$(intermediates)/broadcom/cle/v3d_xml.h: $(addprefix $(MESA_TOP)/src/broadcom/,$(BROADCOM_GENXML_XML_FILES)) $(MESA_TOP)/src/intel/genxml/gen_zipped_file.py
@mkdir -p $(dir $@)
......
src/broadcom/compiler/vir.c
View file @ 3c8c851f
......@@ -774,7 +774,8 @@ uint64_t *v3d_compile_vs(const struct v3d_compiler *compiler,
int sector_size = 16 * sizeof(uint32_t) * 8;
int vpm_size_in_sectors = c->devinfo->vpm_size / sector_size;
int half_vpm = vpm_size_in_sectors / 2;
int vpm_output_batches = half_vpm - prog_data->vpm_input_size;
int vpm_output_sectors = half_vpm - prog_data->vpm_input_size;
int vpm_output_batches = vpm_output_sectors / prog_data->vpm_output_size;
assert(vpm_output_batches >= 2);
prog_data->vcm_cache_size = CLAMP(vpm_output_batches - 1, 2, 4);
......
src/compiler/glsl/glcpp/glcpp-lex.l
View file @ 3c8c851f
......@@ -289,6 +289,7 @@ HEXADECIMAL_INTEGER 0[xX][0-9a-fA-F]+[uU]?
* token. */
if (parser->first_non_space_token_this_line) {
BEGIN HASH;
yyextra->in_define = false;
}
RETURN_TOKEN_NEVER_SKIP (HASH_TOKEN);
......@@ -336,44 +337,56 @@ HEXADECIMAL_INTEGER 0[xX][0-9a-fA-F]+[uU]?
/* For the pre-processor directives, we return these tokens
* even when we are otherwise skipping. */
<HASH>ifdef {
if (!yyextra->in_define) {
BEGIN INITIAL;
yyextra->lexing_directive = 1;
yyextra->space_tokens = 0;
RETURN_TOKEN_NEVER_SKIP (IFDEF);
}
}
<HASH>ifndef {
if (!yyextra->in_define) {
BEGIN INITIAL;
yyextra->lexing_directive = 1;
yyextra->space_tokens = 0;
RETURN_TOKEN_NEVER_SKIP (IFNDEF);
}
}
<HASH>if/[^_a-zA-Z0-9] {
if (!yyextra->in_define) {
BEGIN INITIAL;
yyextra->lexing_directive = 1;
yyextra->space_tokens = 0;
RETURN_TOKEN_NEVER_SKIP (IF);
}
}
<HASH>elif/[^_a-zA-Z0-9] {
if (!yyextra->in_define) {
BEGIN INITIAL;
yyextra->lexing_directive = 1;
yyextra->space_tokens = 0;
RETURN_TOKEN_NEVER_SKIP (ELIF);
}
}
<HASH>else {
if (!yyextra->in_define) {
BEGIN INITIAL;
yyextra->space_tokens = 0;
RETURN_TOKEN_NEVER_SKIP (ELSE);
}
}
<HASH>endif {
if (!yyextra->in_define) {
BEGIN INITIAL;
yyextra->space_tokens = 0;
RETURN_TOKEN_NEVER_SKIP (ENDIF);
}
}
<HASH>error[^\r\n]* {
BEGIN INITIAL;
......@@ -399,6 +412,7 @@ HEXADECIMAL_INTEGER 0[xX][0-9a-fA-F]+[uU]?
* and not whitespace). This will generate an error.
*/
<HASH>define{HSPACE}* {
yyextra->in_define = true;
if (!parser->skipping) {
BEGIN DEFINE;
yyextra->space_tokens = 0;
......@@ -420,9 +434,11 @@ HEXADECIMAL_INTEGER 0[xX][0-9a-fA-F]+[uU]?
/* This will catch any non-directive garbage after a HASH */
<HASH>{NONSPACE} {
if (!parser->skipping) {
BEGIN INITIAL;
RETURN_TOKEN (GARBAGE);
}
}
/* An identifier immediately followed by '(' */
<DEFINE>{IDENTIFIER}/"(" {
......
src/compiler/glsl/glcpp/glcpp.h
View file @ 3c8c851f
......@@ -197,6 +197,7 @@ struct glcpp_parser {
int first_non_space_token_this_line;
int newline_as_space;
int in_control_line;
bool in_define;
int paren_count;
int commented_newlines;
skip_node_t *skip_stack;
......
src/compiler/nir/nir.h
View file @ 3c8c851f
......@@ -2926,6 +2926,7 @@ bool nir_convert_from_ssa(nir_shader *shader, bool phi_webs_only);
bool nir_lower_phis_to_regs_block(nir_block *block);
bool nir_lower_ssa_defs_to_regs_block(nir_block *block);
bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl *impl);
bool nir_opt_algebraic(nir_shader *shader);
bool nir_opt_algebraic_before_ffma(nir_shader *shader);
......