Skip to content
Commits on Source (63)
stable: this commit causes issues in several systems
78e35df52aa2f7d770f929a0866a0faa89c261a9 radeonsi: update buffer descriptors in all contexts after buffer invalidation
mesa (19.1.0~rc3-1) UNRELEASED; urgency=medium
mesa (19.1.0-1) experimental; urgency=medium
* New upstream release candidate.
* New upstream release.
* watch: Upstream switched to xz tarballs.
* rules: Use pkg-info.mk for gentarball.
* Drop upstreamed patches.
......@@ -11,7 +11,7 @@ mesa (19.1.0~rc3-1) UNRELEASED; urgency=medium
* rules: Enable lima, panfrost on armhf/arm64. (Closes: #927893)
* rules: Update clean target.
-- Timo Aaltonen <tjaalton@debian.org> Thu, 09 May 2019 14:24:13 +0300
-- Timo Aaltonen <tjaalton@debian.org> Thu, 13 Jun 2019 10:52:07 +0300
mesa (19.0.3-1) experimental; urgency=medium
......@@ -72,6 +72,14 @@ mesa (19.0.0~rc2-1) experimental; urgency=medium
-- Timo Aaltonen <tjaalton@debian.org> Fri, 08 Feb 2019 10:44:48 +0200
mesa (18.3.6-2) unstable; urgency=medium
* Cherry-pick c77acc3ceba (meson: remove meson-created megadrivers
symlinks) from upstream master branch. Removes a broken symlink
(Closes: #926857).
-- Andreas Boll <aboll@debian.org> Sat, 11 May 2019 15:43:07 +0200
mesa (18.3.6-1) unstable; urgency=medium
[ Timo Aaltonen ]
......
Source diff could not be displayed: it is too large. Options to address this: view the blob.
......@@ -4016,7 +4016,7 @@ ac_build_wg_scan_bottom(struct ac_llvm_context *ctx, struct ac_wg_scan *ws)
/* ws->result_reduce is already the correct value */
if (ws->enable_inclusive)
ws->result_inclusive = ac_build_alu_op(ctx, ws->result_exclusive, ws->src, ws->op);
ws->result_inclusive = ac_build_alu_op(ctx, ws->result_inclusive, ws->src, ws->op);
if (ws->enable_exclusive)
ws->result_exclusive = ac_build_alu_op(ctx, ws->result_exclusive, ws->extra, ws->op);
}
......
......@@ -38,6 +38,7 @@ struct ac_nir_context {
struct ac_shader_abi *abi;
gl_shader_stage stage;
shader_info *info;
LLVMValueRef *ssa_defs;
......@@ -1395,6 +1396,22 @@ static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
}
args->attributes = AC_FUNC_ATTR_READNONE;
bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
/* Prevent texture instructions with implicit derivatives from being
* sinked into branches. */
switch (instr->op) {
case nir_texop_tex:
case nir_texop_txb:
case nir_texop_lod:
args->attributes |= AC_FUNC_ATTR_CONVERGENT;
break;
default:
break;
}
}
return ac_build_image_opcode(&ctx->ac, args);
}
......@@ -4351,6 +4368,7 @@ void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
ctx.abi = abi;
ctx.stage = nir->info.stage;
ctx.info = &nir->info;
ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
......
......@@ -133,17 +133,16 @@ libvulkan_radeon = shared_library(
'vulkan_radeon',
[libradv_files, radv_entrypoints, radv_extensions_c, amd_vk_format_table_c, sha1_h, xmlpool_options_h],
include_directories : [
inc_common, inc_amd, inc_amd_common, inc_compiler, inc_util, inc_vulkan_util,
inc_vulkan_wsi,
inc_common, inc_amd, inc_amd_common, inc_compiler, inc_util, inc_vulkan_wsi,
],
link_with : [
libamd_common, libamdgpu_addrlib, libvulkan_util, libvulkan_wsi,
libamd_common, libamdgpu_addrlib, libvulkan_wsi,
libmesa_util, libxmlconfig
],
dependencies : [
dep_llvm, dep_libdrm_amdgpu, dep_thread, dep_elf, dep_dl, dep_m,
dep_valgrind, radv_deps,
idep_nir,
idep_nir, idep_vulkan_util,
],
c_args : [c_vis_args, no_override_init_args, radv_flags],
cpp_args : [cpp_vis_args, radv_flags],
......
......@@ -566,8 +566,8 @@ radv_save_descriptors(struct radv_cmd_buffer *cmd_buffer,
for_each_bit(i, descriptors_state->valid) {
struct radv_descriptor_set *set = descriptors_state->sets[i];
data[i * 2] = (uintptr_t)set;
data[i * 2 + 1] = (uintptr_t)set >> 32;
data[i * 2] = (uint64_t)(uintptr_t)set;
data[i * 2 + 1] = (uint64_t)(uintptr_t)set >> 32;
}
radv_emit_write_data_packet(cmd_buffer, va, MAX_SETS * 2, data);
......@@ -4825,7 +4825,7 @@ static void write_event(struct radv_cmd_buffer *cmd_buffer,
radv_cs_add_buffer(cmd_buffer->device->ws, cs, event->bo);
MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cs, 18);
MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cs, 21);
/* Flags that only require a top-of-pipe event. */
VkPipelineStageFlags top_of_pipe_flags =
......
......@@ -650,6 +650,7 @@ static bool depth_view_can_fast_clear(struct radv_cmd_buffer *cmd_buffer,
if (radv_image_has_htile(iview->image) &&
iview->base_mip == 0 &&
iview->base_layer == 0 &&
iview->layer_count == iview->image->info.array_size &&
radv_layout_is_htile_compressed(iview->image, layout, queue_mask) &&
radv_image_extent_compare(iview->image, &iview->extent))
return true;
......
......@@ -524,7 +524,7 @@ radv_pipeline_compute_spi_color_formats(struct radv_pipeline *pipeline,
col_format |= cf << (4 * i);
}
if (!col_format && blend->need_src_alpha & (1 << 0)) {
if (!(col_format & 0xf) && blend->need_src_alpha & (1 << 0)) {
/* When a subpass doesn't have any color attachments, write the
* alpha channel of MRT0 when alpha coverage is enabled because
* the depth attachment needs it.
......@@ -542,10 +542,13 @@ radv_pipeline_compute_spi_color_formats(struct radv_pipeline *pipeline,
}
}
blend->cb_shader_mask = ac_get_cb_shader_mask(col_format);
/* The output for dual source blending should have the same format as
* the first output.
*/
if (blend->mrt0_is_dual_src)
col_format |= (col_format & 0xf) << 4;
blend->cb_shader_mask = ac_get_cb_shader_mask(col_format);
blend->spi_shader_col_format = col_format;
}
......
......@@ -129,7 +129,7 @@ nir_lower_non_uniform_access_impl(nir_function_impl *impl,
nir_builder b;
nir_builder_init(&b, impl);
nir_foreach_block(block, impl) {
nir_foreach_block_safe(block, impl) {
nir_foreach_instr_safe(instr, block) {
switch (instr->type) {
case nir_instr_type_tex: {
......
......@@ -216,7 +216,7 @@ node_is_dead(nir_cf_node *node)
nir_foreach_instr(instr, block) {
if (instr->type == nir_instr_type_call)
return true;
return false;
/* Return instructions can cause us to skip over other side-effecting
* instructions after the loop, so consider them to have side effects
......
......@@ -91,7 +91,7 @@ move_load_ubo(nir_block *block)
}
}
return false;
return progress;
}
bool
......
......@@ -65,12 +65,21 @@ add_cf_node(nir_cf_node *cf, struct set *invariants)
static void
add_var(nir_variable *var, struct set *invariants)
{
/* Because we pass the result of nir_intrinsic_get_var directly to this
* function, it's possible for var to be NULL if, for instance, there's a
* cast somewhere in the chain.
*/
if (var != NULL)
_mesa_set_add(invariants, var);
}
static bool
var_is_invariant(nir_variable *var, struct set * invariants)
{
/* Because we pass the result of nir_intrinsic_get_var directly to this
* function, it's possible for var to be NULL if, for instance, there's a
* cast somewhere in the chain.
*/
return var && (var->data.invariant || _mesa_set_search(invariants, var));
}
......
......@@ -1424,6 +1424,37 @@ dri2_surf_update_fence_fd(_EGLContext *ctx,
dri2_surface_set_out_fence_fd(surf, fence_fd);
}
EGLBoolean
dri2_create_drawable(struct dri2_egl_display *dri2_dpy,
const __DRIconfig *config,
struct dri2_egl_surface *dri2_surf)
{
__DRIcreateNewDrawableFunc createNewDrawable;
void *loaderPrivate = dri2_surf;
if (dri2_dpy->image_driver)
createNewDrawable = dri2_dpy->image_driver->createNewDrawable;
else if (dri2_dpy->dri2)
createNewDrawable = dri2_dpy->dri2->createNewDrawable;
else if (dri2_dpy->swrast)
createNewDrawable = dri2_dpy->swrast->createNewDrawable;
else
return _eglError(EGL_BAD_ALLOC, "no createNewDrawable");
/* As always gbm is a bit special.. */
#ifdef HAVE_DRM_PLATFORM
if (dri2_surf->gbm_surf)
loaderPrivate = dri2_surf->gbm_surf;
#endif
dri2_surf->dri_drawable = (*createNewDrawable)(dri2_dpy->dri_screen,
config, loaderPrivate);
if (dri2_surf->dri_drawable == NULL)
return _eglError(EGL_BAD_ALLOC, "createNewDrawable");
return EGL_TRUE;
}
/**
* Called via eglMakeCurrent(), drv->API.MakeCurrent().
*/
......
......@@ -540,6 +540,11 @@ dri2_init_surface(_EGLSurface *surf, _EGLDisplay *disp, EGLint type,
void
dri2_fini_surface(_EGLSurface *surf);
EGLBoolean
dri2_create_drawable(struct dri2_egl_display *dri2_dpy,
const __DRIconfig *config,
struct dri2_egl_surface *dri2_surf);
static inline uint64_t
combine_u32_into_u64(uint32_t hi, uint32_t lo)
{
......
......@@ -341,7 +341,6 @@ droid_create_surface(_EGLDriver *drv, _EGLDisplay *disp, EGLint type,
_EGLConfig *conf, void *native_window,
const EGLint *attrib_list)
{
__DRIcreateNewDrawableFunc createNewDrawable;
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
struct dri2_egl_config *dri2_conf = dri2_egl_config(conf);
struct dri2_egl_surface *dri2_surf;
......@@ -385,17 +384,8 @@ droid_create_surface(_EGLDriver *drv, _EGLDisplay *disp, EGLint type,
goto cleanup_surface;
}
if (dri2_dpy->image_driver)
createNewDrawable = dri2_dpy->image_driver->createNewDrawable;
else
createNewDrawable = dri2_dpy->dri2->createNewDrawable;
dri2_surf->dri_drawable = (*createNewDrawable)(dri2_dpy->dri_screen, config,
dri2_surf);
if (dri2_surf->dri_drawable == NULL) {
_eglError(EGL_BAD_ALLOC, "createNewDrawable");
if (!dri2_create_drawable(dri2_dpy, config, dri2_surf))
goto cleanup_surface;
}
if (window) {
window->common.incRef(&window->common);
......
......@@ -171,23 +171,8 @@ dri2_drm_create_window_surface(_EGLDriver *drv, _EGLDisplay *disp,
dri2_surf->base.Height = surf->base.height;
surf->dri_private = dri2_surf;
if (dri2_dpy->dri2) {
dri2_surf->dri_drawable =
dri2_dpy->dri2->createNewDrawable(dri2_dpy->dri_screen, config,
dri2_surf->gbm_surf);
} else {
assert(dri2_dpy->swrast != NULL);
dri2_surf->dri_drawable =
dri2_dpy->swrast->createNewDrawable(dri2_dpy->dri_screen, config,
dri2_surf->gbm_surf);
}
if (dri2_surf->dri_drawable == NULL) {
_eglError(EGL_BAD_ALLOC, "createNewDrawable()");
if (!dri2_create_drawable(dri2_dpy, config, dri2_surf))
goto cleanup_surf;
}
return &dri2_surf->base;
......
......@@ -135,13 +135,8 @@ dri2_surfaceless_create_surface(_EGLDriver *drv, _EGLDisplay *disp, EGLint type,
goto cleanup_surface;
}
dri2_surf->dri_drawable =
dri2_dpy->image_driver->createNewDrawable(dri2_dpy->dri_screen, config,
dri2_surf);
if (dri2_surf->dri_drawable == NULL) {
_eglError(EGL_BAD_ALLOC, "image->createNewDrawable");
if (!dri2_create_drawable(dri2_dpy, config, dri2_surf))
goto cleanup_surface;
}
if (conf->RedSize == 5)
dri2_surf->visual = __DRI_IMAGE_FORMAT_RGB565;
......
......@@ -272,7 +272,6 @@ dri2_wl_create_window_surface(_EGLDriver *drv, _EGLDisplay *disp,
_EGLConfig *conf, void *native_window,
const EGLint *attrib_list)
{
__DRIcreateNewDrawableFunc createNewDrawable;
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
struct dri2_egl_config *dri2_conf = dri2_egl_config(conf);
struct wl_egl_window *window = native_window;
......@@ -349,19 +348,8 @@ dri2_wl_create_window_surface(_EGLDriver *drv, _EGLDisplay *disp,
if (dri2_dpy->flush)
dri2_surf->wl_win->resize_callback = resize_callback;
if (dri2_dpy->image_driver)
createNewDrawable = dri2_dpy->image_driver->createNewDrawable;
else if (dri2_dpy->dri2)
createNewDrawable = dri2_dpy->dri2->createNewDrawable;
else
createNewDrawable = dri2_dpy->swrast->createNewDrawable;
dri2_surf->dri_drawable = (*createNewDrawable)(dri2_dpy->dri_screen, config,
dri2_surf);
if (dri2_surf->dri_drawable == NULL) {
_eglError(EGL_BAD_ALLOC, "createNewDrawable");
if (!dri2_create_drawable(dri2_dpy, config, dri2_surf))
goto cleanup_surf_wrapper;
}
dri2_surf->base.SwapInterval = dri2_dpy->default_swap_interval;
......