Commits on Source (55)
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Stephen Barber authored
Fixes a compilation error when building libnouveau: In file included from ../src/gallium/drivers/nouveau/nv50/nv50_program.c:25: ../src/compiler/nir/nir.h:1115:10: fatal error: nir_intrinsics.h: No such file or directory #include "nir_intrinsics.h" ^~~~~~~~~~~~~~~~~~ compilation terminated. Fixes: f014ae3c ("nouveau: add support for nir") Signed-off-by:
Stephen Barber <smbarber@chromium.org> Reviewed-by:
Eric Engestrom <eric.engestrom@intel.com> Reviewed-by:
Karol Herbst <kherbst@redhat.com> (cherry picked from commit 8c3ace69)
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Eric Engestrom authored
Fixes: cdc6efdd ("radv: implement all depth/stencil resolve modes using graphics") Signed-off-by:
Eric Engestrom <eric.engestrom@intel.com> Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (cherry picked from commit 30f639c1)
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Eric Engestrom authored
This was a workaround for a bug in Meson that was fixed in 0.46 [1]. [1] https://github.com/mesonbuild/meson/pull/2284 Fixes: f7b6a8d1 ("meson: bump required version to 0.46") Signed-off-by:
Eric Engestrom <eric.engestrom@intel.com> Reviewed-by:
Dylan Baker <dylan@pnwbakers.com> (cherry picked from commit 3fd0afd5)
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Connor Abbott authored
This fixes some piglit tests on radeonsi NIR where a varying is initialized to a constant array in the vertex shader. Varying packing after nir_lower_io_to_temporaries creates writemasked stores which persist after pulling the constant initialization down into the fragment shader. While we're here, rewrite handle_constant_store() to do the loop over components outside the switch, so that we don't have to duplicate the writemask checking for every bitsize. Fixes: 12358505 ("nir: Add a large constants optimization pass") Reviewed-by:
Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> (cherry picked from commit 270fe552)
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Marek Olšák authored
because vl doesn't call flush_resource and I wasn't able to find all places where flush_resource needs to be called. This fixes corrupted / unflushed surfaces with fullscreen videos on Raven. Cc: 19.1 19.2 <mesa-stable@lists.freedesktop.org> (cherry picked from commit f52afdf6)
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Rhys Perry authored
This can happen with loops with unreachable exits which are later optimized away. Fixes assertion in dEQP-VK.graphicsfuzz.unreachable-loops with RADV. Cc: mesa-stable@lists.freedesktop.org Signed-off-by:
Rhys Perry <pendingchaos02@gmail.com> Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit 12372d60)
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Erik Faye-Lund authored
Without this, we'll incorrectly round off huge values to the nearest representable double instead of keeping it at the exact value as we're supposed to. Found by inspecting compiler-warnings. Signed-off-by:
Erik Faye-Lund <erik.faye-lund@collabora.com> Fixes: 85faf508 ("glsl: Add 64-bit integer support for constant expressions") Reviewed-by:
Eric Engestrom <eric.engestrom@intel.com> (cherry picked from commit 88f909eb)
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Dylan Baker authored
We want to generate PC files for non-glvnd builds and for builds with old glvnd, but the current logic doesn't do that, it builds them unconditionally, and for GLES it builds the shared libraries, which is also not what we want. This does not generate .pc files for gles1 or gles2. Which it we weren't doing before either, making this not a regression but a return to status-quo.o Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1838 Fixes: 93df862b ("meson: re-add incorrect pkg-config files with GLVND for backward compatibility") Reviewed-by:
Matt Turner <mattst88@gmail.com> (cherry picked from commit fafd20f6)
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Danylo Piliaiev authored
RET as a last instruction could be safely ignored. Remove it to prevent crashes/warnings in case underlying driver doesn't implement arbitrary returns. A better way would be to remove the RET after the whole shader is parsed which will handle a possible case when the last RET is followed by a comment. CC: <mesa-stable@lists.freedesktop.org> Signed-off-by:
Danylo Piliaiev <danylo.piliaiev@globallogic.com> Reviewed-by:
Axel Davy <davyaxel0@gmail.com> (cherry picked from commit 2d8f77db)
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Lionel Landwerlin authored
Fixes invalid close(-1) in the unit tests. Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: <mesa-stable@lists.freedesktop.org> Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit da2d67fc)
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Ian Romanick authored
Some shaders are hurt by this change because now a load_const(0x00000000) is not recognized as eq_zero when loaded as a float. This behavior is restored in a later patch (nir/range-analysis: Use types to provide better ranges from bcsel and mov). v2: Add a comment about reinterpretation of int/uint/bool. Suggested by Caio. Rewrite condition the check for types being float versus checking for types not being all the things that aren't float. Fixes: 405de7cc ("nir/range-analysis: Rudimentary value range analysis pass") Reviewed-by:
Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> All Gen7+ platforms had similar results. (Ice Lake shown) total instructions in shared programs: 16327543 -> 16328255 (<.01%) instructions in affected programs: 55928 -> 56640 (1.27%) helped: 0 HURT: 208 HURT stats (abs) min: 1 max: 16 x̄: 3.42 x̃: 3 HURT stats (rel) min: 0.33% max: 6.74% x̄: 1.31% x̃: 1.12% 95% mean confidence interval for instructions value: 3.06 3.79 95% mean confidence interval for instructions %-change: 1.17% 1.46% Instructions are HURT. total cycles in shared programs: 363682759 -> 363683977 (<.01%) cycles in affected programs: 325758 -> 326976 (0.37%) helped: 44 HURT: 133 helped stats (abs) min: 1 max: 179 x̄: 33.61 x̃: 5 helped stats (rel) min: 0.06% max: 14.21% x̄: 2.47% x̃: 0.29% HURT stats (abs) min: 1 max: 157 x̄: 20.28 x̃: 14 HURT stats (rel) min: 0.07% max: 14.44% x̄: 1.42% x̃: 0.73% 95% mean confidence interval for cycles value: 0.38 13.39 95% mean confidence interval for cycles %-change: -0.06% 0.96% Inconclusive result (%-change mean confidence interval includes 0). Sandy Bridge total instructions in shared programs: 10787433 -> 10787443 (<.01%) instructions in affected programs: 1842 -> 1852 (0.54%) helped: 0 HURT: 10 HURT stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1 HURT stats (rel) min: 0.33% max: 1.85% x̄: 0.73% x̃: 0.49% 95% mean confidence interval for instructions value: 1.00 1.00 95% mean confidence interval for instructions %-change: 0.36% 1.10% Instructions are HURT. total cycles in shared programs: 153724543 -> 153724563 (<.01%) cycles in affected programs: 8407 -> 8427 (0.24%) helped: 1 HURT: 3 helped stats (abs) min: 18 max: 18 x̄: 18.00 x̃: 18 helped stats (rel) min: 0.98% max: 0.98% x̄: 0.98% x̃: 0.98% HURT stats (abs) min: 4 max: 18 x̄: 12.67 x̃: 16 HURT stats (rel) min: 0.21% max: 0.75% x̄: 0.56% x̃: 0.72% 95% mean confidence interval for cycles value: -21.31 31.31 95% mean confidence interval for cycles %-change: -1.11% 1.46% Inconclusive result (value mean confidence interval includes 0). No shader-db changes on Iron Lake or GM45. (cherry picked from commit 018d2b52)
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Lionel Landwerlin authored
Fixes: 82f6a746 ("intel: Add support for Comet Lake") Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 813f3460)
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Marek Olšák authored
Reviewed-by:
Tapani Pälli <tapani.palli@intel.com> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit d307aa56)
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Tapani Pälli authored
This moves the fix from commit 361f3d19 to happen in get_param (used now instead of get_handle by st/dri). This fixes artifacts seen with Xorg and CCS_E. Fixes: fc12fd05 "iris: Implement pipe_screen::resource_get_param" Signed-off-by:
Tapani Pälli <tapani.palli@intel.com> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit f4d91692)
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Michel Dänzer authored
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111236 (cherry picked from commit 67d930d6)
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Liviu Prodea authored
Reviewed-by:
Jose Fonseca <jfonseca@vmware.com> This patch is based on https://github.com/msys2/MINGW-packages/blob/28e3f85e09b6947ea80036c49f6c38f1394f93ca/mingw-w64-mesa/link-ole32.patch but with tweaks to avoid MSVC build break when applied. v2: Create Mingw platform alias pointing to windows host platform define to avoid spurious crosscompilation; v3: Fix obviously wrong compiler flags for swr driver; v4: Update original patch URL because it has been relocated; v5: Don't bother patching autools stuff as it's not used by MSYS2 Mingw-w64 build and it's days are numbered anyway; v6: After Mingw posix flag fix in 295851eb things are far simpler as we don't need more linking of uuid, ole32, version and shell32 than what is already in place. (cherry picked from commit ffb0d3a2)
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Andreas Gottschling authored
XDestroyImage will mark the segment as to-be-destroyed, but it will persist until we detach it, and we weren't doing so. Cc: mesa-stable@lists.freedesktop.org Gitlab: https://gitlab.freedesktop.org/mesa/mesa/issues/121 Reviewed-by:
Adam Jackson <ajax@redhat.com> (cherry picked from commit c5a2ccec)
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Dylan Baker authored
This fixes cross compiling issues, because pkg-config is less likely to get the wrong libs. v2: - Fix typo in comment Fixes: 22a817af ("meson: build gallium xvmc state tracker") Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/939 Reviewed-by:
Adam Jackson <ajax@redhat.com> (cherry picked from commit 8c5c21d7)
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Dylan Baker authored
Prior to xvmc 1.0.12 libxvmc incorrectly required libxv, but that was fixed. This results in compilation failures for the gallium xvmc tracker and tools. This patch fixes that by explicitly linking to libxv. Fixes: 22a817af ("meson: build gallium xvmc state tracker") Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1844 Reviewed-by:
Adam Jackson <ajax@redhat.com> (cherry picked from commit e456a053)
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Faith Ekstrand authored
Without this, we were DCEing flag writes because we didn't think their results were used because we didn't understand that an ANY32 predicate actually read all the flags. Fixes: df1aec76 "i965/fs: Define methods to calculate the flag..." Reviewed-by:
Matt Turner <mattst88@gmail.com> (cherry picked from commit 6c858b9a)
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Andrii Simiklit authored
glsl 4.4 spec section '5.9 expressions': "The operator is multiply (*), where both operands are matrices or one operand is a vector and the other a matrix. A right vector operand is treated as a column vector and a left vector operand as a row vector. In all these cases, it is required that the number of columns of the left operand is equal to the number of rows of the right operand. Then, the multiply (*) operation does a linear algebraic multiply, yielding an object that has the same number of rows as the left operand and the same number of columns as the right operand. Section 5.10 “Vector and Matrix Operations” explains in more detail how vectors and matrices are operated on." This fix disallows a multiplication of incompatible matrices like: mat4x3(..) * mat4x3(..) mat4x2(..) * mat4x2(..) mat3x2(..) * mat3x2(..) .... CC: <mesa-stable@lists.freedesktop.org> Reviewed-by:
Eric Anholt <eric@anholt.net> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111664 Signed-off-by:
Andrii Simiklit <andrii.simiklit@globallogic.com> (cherry picked from commit b32bb888)
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Mauro Rossi authored
Prerequisite to avoid following radv linking error happening with aco FAILED: out/target/product/x86_64/obj_x86/SHARED_LIBRARIES/vulkan.radv_intermediates/LINKED/vulkan.radv.so ... external/mesa/src/amd/compiler/aco_instruction_selection_setup.cpp:178: error: undefined reference to 'nir_divergence_analysis' clang.real: error: linker command failed with exit code 1 (use -v to see invocation) Fixes: df86c5ff ("nir: add divergence analysis pass.") Signed-off-by:
Mauro Rossi <issor.oruam@gmail.com> (cherry picked from commit 268fb10e)
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Michel Zou authored
SCons 3.1 has moved to python 3, requiring this fix to continue supporting scons builds. Closes: #944 Cc: mesa-stable@lists.freedesktop.org Acked-by:
Eric Engestrom <eric@engestrom.ch> Tested-by:
Eric Engestrom <eric@engestrom.ch> (cherry picked from commit 3f92d178)
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Liviu Prodea authored
As X86AsmPrinter component is gone, LLVMX86AsmPrinter got replaced with LLVMRemarks, LLVMBitstreamReader and LLVMDebugInfoDWARF. Tests done with llvm-config on both LLVM 8 and 9 indicate that mcjit, bitwriter and x86asmprinter fully fit inside engine component. On other platforms and with meson build mcdisassembler was used to replace X86AsmPrinter but mcdisassembler also fully fits inside engine component for LLVM>=8 according to same tests. v2: Avoid duplicating code related to Mingw pthreads. Reviewed-by:
Jose Fonseca <jfonseca@vmware.com> Cc: 19.1 19.2 <mesa-stable@lists.freedesktop.org> On 19.1 this patch does not apply cleanly without 88eb2a1f (cherry picked from commit bcb4dfb1)
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Marek Olšák authored
Cc: 19.2 <mesa-stable@lists.freedesktop.org> Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (cherry picked from commit 3c0938be)
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Marek Olšák authored
Cc: 19.2 <mesa-stable@lists.freedesktop.org> Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (cherry picked from commit 7d970132)
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Marek Olšák authored
Cc: 19.2 <mesa-stable@lists.freedesktop.org> Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (cherry picked from commit b7c2f7c5)
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Kenneth Graunke authored
A while back, Michael Larabel noticed that Paraview's Wavelet Volume case runs significantly slower on iris than i965. It turns out this is because we enable CCS_E for 32-bit floating point formats, while i965 disables it, with an oblique comment saying that we benchmarked it (on what exactly?) and determined that it was a loss. Paraview uses both R32_FLOAT and R32G32B32A32_FLOAT, and I observed large framerate drops when enabling CCS_E for either format. However, several other benchmarks (Aztec Ruins, many Synmark cases) use 16-bit floating point formats, with no apparent ill effects. So, disable compression for 32-bit float formats for now, but leave it enabled for 16-bit float formats as they seem to be working fine. Improves performance in Paraview's Wavelet Volume test by 62% on a Skylake GT4e. Fixes: 3cfc6a20 ("iris: Fill out res->aux.possible_usages") (cherry picked from commit a0a93763)
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Dylan Baker authored
v2: - update copyright year in all changed files - rebase on master Cc: 19.1 19.2 <mesa-stable@lists.freedesktop.org> Reviewed-by:
Eric Engestrom <eric.engestrom@intel.com> (cherry picked from commit 3b265f61)
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Kenneth Graunke authored
We can't just check for the BO base address, we need to check for the full address including any offset we may have applied. When updating the address, we need to include the offset again. Fixes: 5ad0c88d ("iris: Replace buffer backing storage and rebind to update addresses.") (cherry picked from commit 309924c3)
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Ken Mays authored
1. The hgl.c file is a read-only file versus read-write. Ref: src/gallium/state_trackers/hgl/hgl.c 2. I've included the Haiku-specific patches I used to get a successful build of Mesa 19.1.7 on Haiku using the meson/ninja build procedure. Shows "[764/764] linking target ... libswpipe.so" at build completion. v2: Remove autotools files (Eric) v3: Update the patch Reported-by:
Ken Mays <kmays2000@gmail.com> Tested-by:
Ken Mays <kmays2000@gmail.com> CC: mesa-stable@lists.freedesktop.org Reviewed-by:
Alexander von Gluck IV <kallisti5@unixzen.com> (cherry picked from commit 4943c89d)
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Lionel Landwerlin authored
On the Android Antutu benchmark we ran into an assert in ISL where the (base layer + num layers) > total layers. It turns out the core of mesa forgot to clear the _Layer variable, potentially leaving an inconsistent value. v2: Pull setting u->_Layer out of the conditional blocks (Jason) Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: <mesa-stable@lists.freedesktop.org> Reviewed-by:
Eric Engestrom <eric.engestrom@intel.com> Reviewed-by:
Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit 2208d79d)
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Marek Olšák authored
Cc: 19.2 <mesa-stable@lists.freedesktop.org> Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (cherry picked from commit 8cbe8344) Conflicts resolved by Dylan Baker Conflicts: src/amd/common/ac_gpu_info.h
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Marek Olšák authored
Cc: 19.2 <mesa-stable@lists.freedesktop.org> Reviewed-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (cherry picked from commit 235ebe91)
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Lionel Landwerlin authored
i915 will report ENODEV on generations prior to Haswell because there is no point in reporting values on those. This is prior any fusing could happen on parts with identical PCI ids. This query call was previously only triggered on generations that support performance queries, which happens to match generation for which i915 reports topology, but the commit pointed below started using it on all generations. Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Gitlab: https://gitlab.freedesktop.org/mesa/mesa/issues/1860 Cc: <mesa-stable@lists.freedesktop.org> Fixes: 96e1c945 ("i965: Move device info initialization to common code") Reviewed-by:
Mark Janes <mark.a.janes@intel.com> (cherry picked from commit 1c6fdbc8)
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Bas Nieuwenhuizen authored
We need the continue CS for referencing the tess/GDS/sample position BOs. Fixes: 46e52df3 "radv: add tessellation ring allocation support. (v2)" Fixes: e1dc3ab7 "radv/gfx10: allocate GDS/OA buffer objects for NGG streamout" Fixes: 1171b304 "radv: overhaul fragment shader sample positions." Reviewed-by:
Samuel Pitoiset <samuel.pitoiset@gmail.com> (cherry picked from commit 8ad3d8b1)
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Dylan Baker authored
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Dylan Baker authored
Fixes: 3b265f61 ("meson: gallium media state trackers require libdrm with x11") Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1878 Tested-by:
Vinson Lee <vlee@freedesktop.org> (cherry picked from commit 1481d054)
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Andres Gomez authored
The CTS finally has agreed to drop the requirement for a 565-no-depth-no-stencil config for ES 3.0. Hence we can now remove the code to satisfy this requirement using a pbuffer-only visual with whatever other buffers the driver happens to have given us. This reverts commit 82607f8a, commit 6ad31c4f and commit dacb11a5. v2: - Reference the VK-GL-CTS issue (Eric E.). v3: - Don't revert fc21394b ("egl: Quiet warning about front buffer rendering for pixmaps/pbuffers") (Kenneth). References: VK-GL-CTS issue 1601. Cc: mesa-stable@lists.freedesktop.org Signed-off-by:
Andres Gomez <agomez@igalia.com> Acked-by:
Eric Engestrom <eric.engestrom@intel.com> Acked-by:
Eric Anholt <eric@anholt.net> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 02c265be) Conflicts resolved by Dylan Baker
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Lionel Landwerlin authored
We're missing the offset of the slice in the subslice mask... This worked for most platforms that don't have first slice fused off because we would reread the same mask from slice0 again and again... Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: c1900f5b ("intel: devinfo: add helper functions to fill fusing masks values") Gitlab: https://gitlab.freedesktop.org/mesa/mesa/issues/1869 Reviewed-by:
Mark Janes <mark.a.janes@intel.com> (cherry picked from commit d36763b2)
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Lionel Landwerlin authored
It appears we never had a test in piglit or deqp sampling from a null surface... It turns out this triggers a hang on IVB only. Updating the null surface format to R32_UINT fixes the hang on ivb and doesn't affect other platforms, so set it by default for all platforms. Signed-off-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Gitlab: https://gitlab.freedesktop.org/mesa/mesa/issues/1872 Cc: <mesa-stable@lists.freedesktop.org> Reviewed-by:
Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit c445d6f6)
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Liviu Prodea authored
Signed-off-by:
Prodea Alexandru-Liviu <liviuprodea@yahoo.com> Reviewed-by:
Jose Fonseca <jfonseca@vmware.com> Cc: <mesa-stable@lists.freedesktop.org> When building in a MSYS2 Mingw-w64 environment Mesa3D sets wrong default build options which inevitably lead to build failure. (cherry picked from commit 6309c31f)
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Tapani Pälli authored
This fixes a case where user first creates image and then later binds it with memory created from AHW buffer. Cc: <mesa-stable@lists.freedesktop.org> Signed-off-by:
Tapani Pälli <tapani.palli@intel.com> Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> (cherry picked from commit e4a826b2)
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Eric Engestrom authored
Fixes: 4929f020 ("iris: better SBE") Signed-off-by:
Eric Engestrom <eric.engestrom@intel.com> Reviewed-by:
Dylan Baker <dylan@pnwbakers.com> (cherry picked from commit 731097c7)
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Dylan Baker authored
This script is responsible for generating an entire page in the docs/relnotes/ directory. It includes a template for the page, and uses mako to fill in the necessary bits. It is designed to be purely fire and forget, calculating previous versions, shortlogs, bug fixes, and dates. Acked-by:
Eric Engestrom <eric.engestrom@intel.com> Acked-by:
Juan A. Suarez <jasuarez@igalia.com> (cherry picked from commit 86079447)
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Dylan Baker authored
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Dylan Baker authored
This script is for updating post version bump. Acked-by:
Eric Engestrom <eric.engestrom@intel.com> Acked-by:
Juan A. Suarez <jasuarez@igalia.com> (cherry picked from commit 3226b12a)
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Dylan Baker authored
Acked-by:
Eric Engestrom <eric.engestrom@intel.com> Acked-by:
Juan A. Suarez <jasuarez@igalia.com> (cherry picked from commit 974e3ad0)
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Dylan Baker authored
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Dylan Baker authored
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Timo Aaltonen authored
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Timo Aaltonen authored
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Timo Aaltonen authored
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Timo Aaltonen authored
Revert-meson-fix-logic-for-generating-.pc-files-with.patch: Revert a commit which attempted to fix the .pc generating logic, but regressed GLES2.
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Timo Aaltonen authored
bin/__init__.py
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bin/bugzilla_mesa.sh
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bin/post_version.py
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