Skip to content
Snippets Groups Projects

Compare revisions

Changes are shown as if the source revision was being merged into the target revision. Learn more about comparing revisions.

Source

Select target project
No results found

Target

Select target project
  • Maytha8/glibc
  • vimerbf-guest/glibc
  • schopin/glibc
  • yumeyao/glibc
  • carlespina/po-debconf-manager-glibc
  • Claudia/glibc-widevine
  • andrewsh/glibc
  • jscott/glibc
  • bluca/glibc
  • gioele/glibc
  • rouca/glibc
  • sven/glibc
  • josch/glibc
  • cjwatson/glibc
  • fw/glibc
  • rbalint/glibc
  • bsd-team/glibc-packaging
  • glibc-team/glibc
  • bigon/glibc
  • ahrex-guest/glibc
  • friki/glibc
21 results
Show changes
Commits on Source (4)
Hide whitespace changes
Inline Side-by-side
debian/changelog
View file @ 170e7d68
glibc (2.38-5) UNRELEASED; urgency=medium
glibc (2.38-5) experimental; urgency=medium
 
[ Flavio Cruz ]
* debian/patches/hurd-i386/git-64bit-abi.diff: Finalize hurd-amd64 ABI.
 
-- Samuel Thibault <sthibault@debian.org> Mon, 18 Dec 2023 01:41:13 +0100
[ Aurelien Jarno ]
* debian/patches/git-updates.diff: update from upstream stable branch.
* debian/patches/riscv64/git-risc-v-add-support-for-dl_runtime_profile.diff:
backport upstream support for profile/audit PLT setup on RISC-V.
* debian/testsuite-xfail-debian.mk: drop tst-sprof-basic XFAIL from riscv64,
now that dl_profile is supported.
-- Aurelien Jarno <aurel32@debian.org> Sat, 30 Dec 2023 12:18:33 +0100
 
glibc (2.38-4) experimental; urgency=medium
 
......
debian/patches/git-updates.diff
View file @ 170e7d68
GIT update of https://sourceware.org/git/glibc.git/release/2.38/master from glibc-2.38
diff --git a/NEWS b/NEWS
index 872bc8907b..5ac488bf9b 100644
index 872bc8907b..905230b838 100644
--- a/NEWS
+++ b/NEWS
@@ -4,6 +4,40 @@ See the end for copying conditions.
@@ -4,6 +4,48 @@ See the end for copying conditions.
Please send GNU C library bug reports via <https://sourceware.org/bugzilla/>
using `glibc' in the "product" field.
......@@ -35,16 +35,61 @@ index 872bc8907b..5ac488bf9b 100644
+
+The following bugs are resolved with this release:
+
+ [29039] Corrupt DTV after reuse of a TLS module ID following dlclose with unused TLS
+ [30694] The iconv program no longer tells the user which given encoding name was wrong
+ [30709] nscd fails to build with cleanup handler if built with -fexceptions
+ [30721] x86_64: Fix build with --disable-multiarch
+ [30723] posix_memalign repeatedly scans long bin lists
+ [30745] Slight bug in cache info codes for x86
+ [30789] sem_open will fail on multithreaded scenarios when semaphore
+ file doesn't exist (O_CREAT)
+ [30804] F_GETLK, F_SETLK, and F_SETLKW value change for powerpc64 with
+ -D_FILE_OFFSET_BITS=64
+ [30842] Stack read overflow in getaddrinfo in no-aaaa mode (CVE-2023-4527)
+ [30843] potential use-after-free in getcanonname (CVE-2023-4806)
+ [31184] FAIL: elf/tst-tlsgap
+ [31185] Incorrect thread point access in _dl_tlsdesc_undefweak and _dl_tlsdesc_dynamic
+
Version 2.38
diff --git a/elf/Makefile b/elf/Makefile
index c00e2ccfc5..1a05a6aaca 100644
--- a/elf/Makefile
+++ b/elf/Makefile
@@ -459,6 +459,7 @@ tests += \
tst-tls21 \
tst-tlsalign \
tst-tlsalign-extern \
+ tst-tlsgap \
tst-unique1 \
tst-unique2 \
tst-unwind-ctor \
@@ -883,6 +884,9 @@ modules-names += \
tst-tls20mod-bad \
tst-tls21mod \
tst-tlsalign-lib \
+ tst-tlsgap-mod0 \
+ tst-tlsgap-mod1 \
+ tst-tlsgap-mod2 \
tst-tlsmod1 \
tst-tlsmod10 \
tst-tlsmod11 \
@@ -3009,3 +3013,14 @@ LDFLAGS-tst-dlclose-lazy-mod1.so = -Wl,-z,lazy,--no-as-needed
$(objpfx)tst-dlclose-lazy-mod1.so: $(objpfx)tst-dlclose-lazy-mod2.so
$(objpfx)tst-dlclose-lazy.out: \
$(objpfx)tst-dlclose-lazy-mod1.so $(objpfx)tst-dlclose-lazy-mod2.so
+
+$(objpfx)tst-tlsgap: $(shared-thread-library)
+$(objpfx)tst-tlsgap.out: \
+ $(objpfx)tst-tlsgap-mod0.so \
+ $(objpfx)tst-tlsgap-mod1.so \
+ $(objpfx)tst-tlsgap-mod2.so
+ifeq (yes,$(have-mtls-dialect-gnu2))
+CFLAGS-tst-tlsgap-mod0.c += -mtls-dialect=gnu2
+CFLAGS-tst-tlsgap-mod1.c += -mtls-dialect=gnu2
+CFLAGS-tst-tlsgap-mod2.c += -mtls-dialect=gnu2
+endif
diff --git a/elf/dl-init.c b/elf/dl-init.c
index 5b0732590f..ba4d2fdc85 100644
--- a/elf/dl-init.c
......@@ -66,6 +111,18 @@ index 5b0732590f..ba4d2fdc85 100644
if (l->l_init_called)
/* This object is all done. */
diff --git a/elf/dl-tls.c b/elf/dl-tls.c
index 99b83ca696..1f6f820819 100644
--- a/elf/dl-tls.c
+++ b/elf/dl-tls.c
@@ -154,6 +154,7 @@ _dl_assign_tls_modid (struct link_map *l)
{
/* Mark the entry as used, so any dependency see it. */
atomic_store_relaxed (&runp->slotinfo[result - disp].map, l);
+ atomic_store_relaxed (&runp->slotinfo[result - disp].gen, 0);
break;
}
diff --git a/elf/dl-tunables.c b/elf/dl-tunables.c
index 62b7332d95..cae67efa0a 100644
--- a/elf/dl-tunables.c
......@@ -102,6 +159,18 @@ index 62b7332d95..cae67efa0a 100644
}
/* Enable the glibc.malloc.check tunable in SETUID/SETGID programs only when
diff --git a/elf/readelflib.c b/elf/readelflib.c
index f5b8c80e38..64f1d662a9 100644
--- a/elf/readelflib.c
+++ b/elf/readelflib.c
@@ -107,6 +107,7 @@ process_elf_file (const char *file_name, const char *lib, int *flag,
case PT_INTERP:
program_interpreter = (char *) (file_contents + segment->p_offset);
check_ptr (program_interpreter);
+ break;
case PT_GNU_PROPERTY:
/* The NT_GNU_PROPERTY_TYPE_0 note must be aligned to 4 bytes
diff --git a/elf/tst-env-setuid-tunables.c b/elf/tst-env-setuid-tunables.c
index 7dfb0e073a..f0b92c97e7 100644
--- a/elf/tst-env-setuid-tunables.c
......@@ -193,6 +262,128 @@ index 7dfb0e073a..f0b92c97e7 100644
}
}
diff --git a/elf/tst-tlsgap-mod0.c b/elf/tst-tlsgap-mod0.c
new file mode 100644
index 0000000000..1478b0beac
--- /dev/null
+++ b/elf/tst-tlsgap-mod0.c
@@ -0,0 +1,2 @@
+int __thread tls0;
+int *f0(void) { return &tls0; }
diff --git a/elf/tst-tlsgap-mod1.c b/elf/tst-tlsgap-mod1.c
new file mode 100644
index 0000000000..b10fc3702c
--- /dev/null
+++ b/elf/tst-tlsgap-mod1.c
@@ -0,0 +1,2 @@
+int __thread tls1[100]; /* Size > glibc.rtld.optional_static_tls / 2. */
+int *f1(void) { return tls1; }
diff --git a/elf/tst-tlsgap-mod2.c b/elf/tst-tlsgap-mod2.c
new file mode 100644
index 0000000000..166c27d7f3
--- /dev/null
+++ b/elf/tst-tlsgap-mod2.c
@@ -0,0 +1,2 @@
+int __thread tls2;
+int *f2(void) { return &tls2; }
diff --git a/elf/tst-tlsgap.c b/elf/tst-tlsgap.c
new file mode 100644
index 0000000000..4932885076
--- /dev/null
+++ b/elf/tst-tlsgap.c
@@ -0,0 +1,92 @@
+/* TLS modid gap reuse regression test for bug 29039.
+ Copyright (C) 2023 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <stdio.h>
+#include <dlfcn.h>
+#include <pthread.h>
+#include <support/xdlfcn.h>
+#include <support/xthread.h>
+#include <support/check.h>
+
+static void *mod[3];
+#define MOD(i) "tst-tlsgap-mod" #i ".so"
+static const char *modname[3] = { MOD(0), MOD(1), MOD(2) };
+#undef MOD
+
+static void
+open_mod (int i)
+{
+ mod[i] = xdlopen (modname[i], RTLD_LAZY);
+ printf ("open %s\n", modname[i]);
+}
+
+static void
+close_mod (int i)
+{
+ xdlclose (mod[i]);
+ mod[i] = NULL;
+ printf ("close %s\n", modname[i]);
+}
+
+static void
+access_mod (int i, const char *sym)
+{
+ int *(*f) (void) = xdlsym (mod[i], sym);
+ int *p = f ();
+ printf ("access %s: %s() = %p\n", modname[i], sym, p);
+ TEST_VERIFY_EXIT (p != NULL);
+ ++*p;
+}
+
+static void *
+start (void *arg)
+{
+ /* The DTV generation is at the last dlopen of mod0 and the
+ entry for mod1 is NULL. */
+
+ open_mod (1); /* Reuse modid of mod1. Uses dynamic TLS. */
+
+ /* DTV is unchanged: dlopen only updates the DTV to the latest
+ generation if static TLS is allocated for a loaded module.
+
+ With bug 29039, the TLSDESC relocation in mod1 uses the old
+ dlclose generation of mod1 instead of the new dlopen one so
+ DTV is not updated on TLS access. */
+
+ access_mod (1, "f1");
+
+ return arg;
+}
+
+static int
+do_test (void)
+{
+ open_mod (0);
+ open_mod (1);
+ open_mod (2);
+ close_mod (0);
+ close_mod (1); /* Create modid gap at mod1. */
+ open_mod (0); /* Reuse modid of mod0, bump generation count. */
+
+ /* Create a thread where DTV of mod1 is NULL. */
+ pthread_t t = xpthread_create (NULL, start, NULL);
+ xpthread_join (t);
+ return 0;
+}
+
+#include <support/test-driver.c>
diff --git a/iconv/iconv_prog.c b/iconv/iconv_prog.c
index bee898c63c..cf32cf9b44 100644
--- a/iconv/iconv_prog.c
......@@ -1429,6 +1620,102 @@ index 1a7503858d..8179ef7c0b 100644
+#else
+# include <debug/memset_chk.c>
#endif
diff --git a/sysdeps/loongarch/dl-trampoline.h b/sysdeps/loongarch/dl-trampoline.h
index 02375286f8..99fcacab76 100644
--- a/sysdeps/loongarch/dl-trampoline.h
+++ b/sysdeps/loongarch/dl-trampoline.h
@@ -19,9 +19,9 @@
/* Assembler veneer called from the PLT header code for lazy loading.
The PLT header passes its own args in t0-t2. */
#ifdef USE_LASX
-# define FRAME_SIZE (-((-9 * SZREG - 8 * SZFREG - 8 * SZXREG) & ALMASK))
+# define FRAME_SIZE (-((-9 * SZREG - 8 * SZXREG) & ALMASK))
#elif defined USE_LSX
-# define FRAME_SIZE (-((-9 * SZREG - 8 * SZFREG - 8 * SZVREG) & ALMASK))
+# define FRAME_SIZE (-((-9 * SZREG - 8 * SZVREG) & ALMASK))
#elif !defined __loongarch_soft_float
# define FRAME_SIZE (-((-9 * SZREG - 8 * SZFREG) & ALMASK))
#else
@@ -44,23 +44,23 @@ ENTRY (_dl_runtime_resolve)
REG_S a7, sp, 8*SZREG
#ifdef USE_LASX
- xvst xr0, sp, 9*SZREG + 8*SZFREG + 0*SZXREG
- xvst xr1, sp, 9*SZREG + 8*SZFREG + 1*SZXREG
- xvst xr2, sp, 9*SZREG + 8*SZFREG + 2*SZXREG
- xvst xr3, sp, 9*SZREG + 8*SZFREG + 3*SZXREG
- xvst xr4, sp, 9*SZREG + 8*SZFREG + 4*SZXREG
- xvst xr5, sp, 9*SZREG + 8*SZFREG + 5*SZXREG
- xvst xr6, sp, 9*SZREG + 8*SZFREG + 6*SZXREG
- xvst xr7, sp, 9*SZREG + 8*SZFREG + 7*SZXREG
+ xvst xr0, sp, 9*SZREG + 0*SZXREG
+ xvst xr1, sp, 9*SZREG + 1*SZXREG
+ xvst xr2, sp, 9*SZREG + 2*SZXREG
+ xvst xr3, sp, 9*SZREG + 3*SZXREG
+ xvst xr4, sp, 9*SZREG + 4*SZXREG
+ xvst xr5, sp, 9*SZREG + 5*SZXREG
+ xvst xr6, sp, 9*SZREG + 6*SZXREG
+ xvst xr7, sp, 9*SZREG + 7*SZXREG
#elif defined USE_LSX
- vst vr0, sp, 9*SZREG + 8*SZFREG + 0*SZVREG
- vst vr1, sp, 9*SZREG + 8*SZFREG + 1*SZVREG
- vst vr2, sp, 9*SZREG + 8*SZFREG + 2*SZVREG
- vst vr3, sp, 9*SZREG + 8*SZFREG + 3*SZVREG
- vst vr4, sp, 9*SZREG + 8*SZFREG + 4*SZVREG
- vst vr5, sp, 9*SZREG + 8*SZFREG + 5*SZVREG
- vst vr6, sp, 9*SZREG + 8*SZFREG + 6*SZVREG
- vst vr7, sp, 9*SZREG + 8*SZFREG + 7*SZVREG
+ vst vr0, sp, 9*SZREG + 0*SZVREG
+ vst vr1, sp, 9*SZREG + 1*SZVREG
+ vst vr2, sp, 9*SZREG + 2*SZVREG
+ vst vr3, sp, 9*SZREG + 3*SZVREG
+ vst vr4, sp, 9*SZREG + 4*SZVREG
+ vst vr5, sp, 9*SZREG + 5*SZVREG
+ vst vr6, sp, 9*SZREG + 6*SZVREG
+ vst vr7, sp, 9*SZREG + 7*SZVREG
#elif !defined __loongarch_soft_float
FREG_S fa0, sp, 9*SZREG + 0*SZFREG
FREG_S fa1, sp, 9*SZREG + 1*SZFREG
@@ -92,23 +92,23 @@ ENTRY (_dl_runtime_resolve)
REG_L a7, sp, 8*SZREG
#ifdef USE_LASX
- xvld xr0, sp, 9*SZREG + 8*SZFREG + 0*SZXREG
- xvld xr1, sp, 9*SZREG + 8*SZFREG + 1*SZXREG
- xvld xr2, sp, 9*SZREG + 8*SZFREG + 2*SZXREG
- xvld xr3, sp, 9*SZREG + 8*SZFREG + 3*SZXREG
- xvld xr4, sp, 9*SZREG + 8*SZFREG + 4*SZXREG
- xvld xr5, sp, 9*SZREG + 8*SZFREG + 5*SZXREG
- xvld xr6, sp, 9*SZREG + 8*SZFREG + 6*SZXREG
- xvld xr7, sp, 9*SZREG + 8*SZFREG + 7*SZXREG
+ xvld xr0, sp, 9*SZREG + 0*SZXREG
+ xvld xr1, sp, 9*SZREG + 1*SZXREG
+ xvld xr2, sp, 9*SZREG + 2*SZXREG
+ xvld xr3, sp, 9*SZREG + 3*SZXREG
+ xvld xr4, sp, 9*SZREG + 4*SZXREG
+ xvld xr5, sp, 9*SZREG + 5*SZXREG
+ xvld xr6, sp, 9*SZREG + 6*SZXREG
+ xvld xr7, sp, 9*SZREG + 7*SZXREG
#elif defined USE_LSX
- vld vr0, sp, 9*SZREG + 8*SZFREG + 0*SZVREG
- vld vr1, sp, 9*SZREG + 8*SZFREG + 1*SZVREG
- vld vr2, sp, 9*SZREG + 8*SZFREG + 2*SZVREG
- vld vr3, sp, 9*SZREG + 8*SZFREG + 3*SZVREG
- vld vr4, sp, 9*SZREG + 8*SZFREG + 4*SZVREG
- vld vr5, sp, 9*SZREG + 8*SZFREG + 5*SZVREG
- vld vr6, sp, 9*SZREG + 8*SZFREG + 6*SZVREG
- vld vr7, sp, 9*SZREG + 8*SZFREG + 7*SZVREG
+ vld vr0, sp, 9*SZREG + 0*SZVREG
+ vld vr1, sp, 9*SZREG + 1*SZVREG
+ vld vr2, sp, 9*SZREG + 2*SZVREG
+ vld vr3, sp, 9*SZREG + 3*SZVREG
+ vld vr4, sp, 9*SZREG + 4*SZVREG
+ vld vr5, sp, 9*SZREG + 5*SZVREG
+ vld vr6, sp, 9*SZREG + 6*SZVREG
+ vld vr7, sp, 9*SZREG + 7*SZVREG
#elif !defined __loongarch_soft_float
FREG_L fa0, sp, 9*SZREG + 0*SZFREG
FREG_L fa1, sp, 9*SZREG + 1*SZFREG
diff --git a/sysdeps/posix/getaddrinfo.c b/sysdeps/posix/getaddrinfo.c
index 0356b622be..13082305d3 100644
--- a/sysdeps/posix/getaddrinfo.c
......@@ -1909,6 +2196,37 @@ index cd4d0351ae..5ddb35c9d9 100644
}
cpu_features->level1_icache_size = level1_icache_size;
diff --git a/sysdeps/x86_64/dl-tlsdesc.S b/sysdeps/x86_64/dl-tlsdesc.S
index 5593897e29..4579424bf7 100644
--- a/sysdeps/x86_64/dl-tlsdesc.S
+++ b/sysdeps/x86_64/dl-tlsdesc.S
@@ -61,7 +61,7 @@ _dl_tlsdesc_return:
_dl_tlsdesc_undefweak:
_CET_ENDBR
movq 8(%rax), %rax
- subq %fs:0, %rax
+ sub %fs:0, %RAX_LP
ret
cfi_endproc
.size _dl_tlsdesc_undefweak, .-_dl_tlsdesc_undefweak
@@ -102,7 +102,7 @@ _dl_tlsdesc_dynamic:
/* Preserve call-clobbered registers that we modify.
We need two scratch regs anyway. */
movq %rsi, -16(%rsp)
- movq %fs:DTV_OFFSET, %rsi
+ mov %fs:DTV_OFFSET, %RSI_LP
movq %rdi, -8(%rsp)
movq TLSDESC_ARG(%rax), %rdi
movq (%rsi), %rax
@@ -116,7 +116,7 @@ _dl_tlsdesc_dynamic:
addq TLSDESC_MODOFF(%rdi), %rax
.Lret:
movq -16(%rsp), %rsi
- subq %fs:0, %rax
+ sub %fs:0, %RAX_LP
movq -8(%rsp), %rdi
ret
.Lslow:
diff --git a/sysdeps/x86_64/memcpy.S b/sysdeps/x86_64/memcpy.S
index d98500a78a..4922cba657 100644
--- a/sysdeps/x86_64/memcpy.S
......
debian/patches/riscv64/git-risc-v-add-support-for-dl_runtime_profile.diff 0 → 100644
View file @ 170e7d68
commit 6b32696116e0097f5dd578ec087bcbef483f2a07
Author: Aurelien Jarno <aurelien@aurel32.net>
Date: Sat Dec 30 11:00:10 2023 +0100
RISC-V: Add support for dl_runtime_profile (BZ #31151)
Code is mostly inspired from the LoongArch one, which has a similar ABI,
with minor changes to support riscv32 and register differences.
This fixes elf/tst-sprof-basic. This also fixes elf/tst-audit1,
elf/tst-audit2 and elf/tst-audit8 with recent binutils snapshots when
--enable-bind-now is used.
Resolves: BZ #31151
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
diff --git a/sysdeps/riscv/Makefile b/sysdeps/riscv/Makefile
index 8fb10b164f..c08753ae8a 100644
--- a/sysdeps/riscv/Makefile
+++ b/sysdeps/riscv/Makefile
@@ -2,6 +2,10 @@ ifeq ($(subdir),misc)
sysdep_headers += sys/asm.h
endif
+ifeq ($(subdir),elf)
+gen-as-const-headers += dl-link.sym
+endif
+
# RISC-V's assembler also needs to know about PIC as it changes the definition
# of some assembler macros.
ASFLAGS-.os += $(pic-ccflag)
diff --git a/sysdeps/riscv/dl-link.sym b/sysdeps/riscv/dl-link.sym
new file mode 100644
index 0000000000..b430a064c9
--- /dev/null
+++ b/sysdeps/riscv/dl-link.sym
@@ -0,0 +1,18 @@
+#include <stddef.h>
+#include <sysdep.h>
+#include <link.h>
+
+DL_SIZEOF_RG sizeof(struct La_riscv_regs)
+DL_SIZEOF_RV sizeof(struct La_riscv_retval)
+
+DL_OFFSET_RG_A0 offsetof(struct La_riscv_regs, lr_reg)
+#ifndef __riscv_float_abi_soft
+DL_OFFSET_RG_FA0 offsetof(struct La_riscv_regs, lr_fpreg)
+#endif
+DL_OFFSET_RG_RA offsetof(struct La_riscv_regs, lr_ra)
+DL_OFFSET_RG_SP offsetof(struct La_riscv_regs, lr_sp)
+
+DL_OFFSET_RV_A0 offsetof(struct La_riscv_retval, lrv_a0)
+#ifndef __riscv_float_abi_soft
+DL_OFFSET_RV_FA0 offsetof(struct La_riscv_retval, lrv_fa0)
+#endif
diff --git a/sysdeps/riscv/dl-machine.h b/sysdeps/riscv/dl-machine.h
index c0c9bd93ad..48aee81aa9 100644
--- a/sysdeps/riscv/dl-machine.h
+++ b/sysdeps/riscv/dl-machine.h
@@ -313,13 +313,38 @@ elf_machine_runtime_setup (struct link_map *l, struct r_scope_elem *scope[],
if (l->l_info[DT_JMPREL])
{
extern void _dl_runtime_resolve (void) __attribute__ ((visibility ("hidden")));
+ extern void _dl_runtime_profile (void) __attribute__ ((visibility ("hidden")));
ElfW(Addr) *gotplt = (ElfW(Addr) *) D_PTR (l, l_info[DT_PLTGOT]);
/* If a library is prelinked but we have to relocate anyway,
we have to be able to undo the prelinking of .got.plt.
The prelinker saved the address of .plt for us here. */
if (gotplt[1])
l->l_mach.plt = gotplt[1] + l->l_addr;
- gotplt[0] = (ElfW(Addr)) &_dl_runtime_resolve;
+ /* The gotplt[0] entry contains the address of a function which gets
+ called to get the address of a so far unresolved function and
+ jump to it. The profiling extension of the dynamic linker allows
+ to intercept the calls to collect information. In this case we
+ don't store the address in the GOT so that all future calls also
+ end in this function. */
+#ifdef SHARED
+ if (profile != 0)
+ {
+ gotplt[0] = (ElfW(Addr)) &_dl_runtime_profile;
+
+ if (GLRO(dl_profile) != NULL
+ && _dl_name_match_p (GLRO(dl_profile), l))
+ /* Say that we really want profiling and the timers are
+ started. */
+ GL(dl_profile_map) = l;
+ }
+ else
+#endif
+ {
+ /* This function will get called to fix up the GOT entry
+ indicated by the offset on the stack, and then jump to
+ the resolved address. */
+ gotplt[0] = (ElfW(Addr)) &_dl_runtime_resolve;
+ }
gotplt[1] = (ElfW(Addr)) l;
}
diff --git a/sysdeps/riscv/dl-trampoline.S b/sysdeps/riscv/dl-trampoline.S
index dec304180b..ecaee0540e 100644
--- a/sysdeps/riscv/dl-trampoline.S
+++ b/sysdeps/riscv/dl-trampoline.S
@@ -20,6 +20,8 @@
#include <sysdep.h>
#include <sys/asm.h>
+#include "dl-link.h"
+
/* Assembler veneer called from the PLT header code for lazy loading.
The PLT header passes its own args in t0-t2. */
@@ -88,3 +90,178 @@ ENTRY (_dl_runtime_resolve)
# Invoke the callee.
jr t1
END (_dl_runtime_resolve)
+
+#if !defined PROF && defined SHARED
+ENTRY (_dl_runtime_profile)
+ /* RISC-V we get called with:
+ t0 linkr_map pointer
+ t1 the scaled offset stored in t0, which can be used
+ to calculate the offset of the current symbol in .rela.plt
+ t2 %hi(%pcrel(.got.plt)) stored in t2, no use in this function
+ t3 dl resolver entry point, no use in this function
+
+ Stack frame layout with hard float:
+ RV64 RV32
+ [sp, #96] [sp, #48] La_riscv_regs
+ [sp, #48] [sp, #24] La_riscv_retval
+ [sp, #40] [sp, #20] frame size return from pltenter
+ [sp, #32] [sp, #16] dl_profile_call saved a1
+ [sp, #24] [sp, #12] dl_profile_call saved a0
+ [sp, #16] [sp, #8] T1
+ [sp, #0] [sp, #0] ra, fp <- fp
+ */
+
+# define OFFSET_T1 2*SZREG
+# define OFFSET_SAVED_CALL_A0 OFFSET_T1 + SZREG
+# define OFFSET_SAVED_CALL_A1 OFFSET_SAVED_CALL_A0 + SZREG
+# define OFFSET_FS OFFSET_SAVED_CALL_A1 + SZREG
+# define OFFSET_RV OFFSET_FS + SZREG
+# define OFFSET_RG OFFSET_RV + DL_SIZEOF_RV
+
+# define SF_SIZE (-(-(OFFSET_RG + DL_SIZEOF_RG) & ALMASK))
+
+ # Save arguments to stack.
+ add sp, sp, -SF_SIZE
+ REG_S ra, 0(sp)
+ REG_S fp, SZREG(sp)
+
+ mv fp, sp
+
+ REG_S a0, OFFSET_RG + DL_OFFSET_RG_A0 + 0*SZREG(fp)
+ REG_S a1, OFFSET_RG + DL_OFFSET_RG_A0 + 1*SZREG(fp)
+ REG_S a2, OFFSET_RG + DL_OFFSET_RG_A0 + 2*SZREG(fp)
+ REG_S a3, OFFSET_RG + DL_OFFSET_RG_A0 + 3*SZREG(fp)
+ REG_S a4, OFFSET_RG + DL_OFFSET_RG_A0 + 4*SZREG(fp)
+ REG_S a5, OFFSET_RG + DL_OFFSET_RG_A0 + 5*SZREG(fp)
+ REG_S a6, OFFSET_RG + DL_OFFSET_RG_A0 + 6*SZREG(fp)
+ REG_S a7, OFFSET_RG + DL_OFFSET_RG_A0 + 7*SZREG(fp)
+
+#ifndef __riscv_float_abi_soft
+ FREG_S fa0, OFFSET_RG + DL_OFFSET_RG_FA0 + 0*SZFREG(fp)
+ FREG_S fa1, OFFSET_RG + DL_OFFSET_RG_FA0 + 1*SZFREG(fp)
+ FREG_S fa2, OFFSET_RG + DL_OFFSET_RG_FA0 + 2*SZFREG(fp)
+ FREG_S fa3, OFFSET_RG + DL_OFFSET_RG_FA0 + 3*SZFREG(fp)
+ FREG_S fa4, OFFSET_RG + DL_OFFSET_RG_FA0 + 4*SZFREG(fp)
+ FREG_S fa5, OFFSET_RG + DL_OFFSET_RG_FA0 + 5*SZFREG(fp)
+ FREG_S fa6, OFFSET_RG + DL_OFFSET_RG_FA0 + 6*SZFREG(fp)
+ FREG_S fa7, OFFSET_RG + DL_OFFSET_RG_FA0 + 7*SZFREG(fp)
+#endif
+
+ # Update .got.plt and obtain runtime address of callee.
+ slli a1, t1, 1
+ mv a0, t0
+ add a1, a1, t1 # link map
+ mv a2, ra # return addr
+ addi a3, fp, OFFSET_RG # La_riscv_regs pointer
+ addi a4, fp, OFFSET_FS # frame size return from pltenter
+
+ REG_S a0, OFFSET_SAVED_CALL_A0(fp)
+ REG_S a1, OFFSET_SAVED_CALL_A1(fp)
+
+ la t2, _dl_profile_fixup
+ jalr t2
+
+ REG_L t3, OFFSET_FS(fp)
+ bgez t3, 1f
+
+ # Save the return.
+ mv t4, a0
+
+ # Restore arguments from stack.
+ REG_L a0, OFFSET_RG + DL_OFFSET_RG_A0 + 0*SZREG(fp)
+ REG_L a1, OFFSET_RG + DL_OFFSET_RG_A0 + 1*SZREG(fp)
+ REG_L a2, OFFSET_RG + DL_OFFSET_RG_A0 + 2*SZREG(fp)
+ REG_L a3, OFFSET_RG + DL_OFFSET_RG_A0 + 3*SZREG(fp)
+ REG_L a4, OFFSET_RG + DL_OFFSET_RG_A0 + 4*SZREG(fp)
+ REG_L a5, OFFSET_RG + DL_OFFSET_RG_A0 + 5*SZREG(fp)
+ REG_L a6, OFFSET_RG + DL_OFFSET_RG_A0 + 6*SZREG(fp)
+ REG_L a7, OFFSET_RG + DL_OFFSET_RG_A0 + 7*SZREG(fp)
+
+#ifndef __riscv_float_abi_soft
+ FREG_L fa0, OFFSET_RG + DL_OFFSET_RG_FA0 + 0*SZFREG(fp)
+ FREG_L fa1, OFFSET_RG + DL_OFFSET_RG_FA0 + 1*SZFREG(fp)
+ FREG_L fa2, OFFSET_RG + DL_OFFSET_RG_FA0 + 2*SZFREG(fp)
+ FREG_L fa3, OFFSET_RG + DL_OFFSET_RG_FA0 + 3*SZFREG(fp)
+ FREG_L fa4, OFFSET_RG + DL_OFFSET_RG_FA0 + 4*SZFREG(fp)
+ FREG_L fa5, OFFSET_RG + DL_OFFSET_RG_FA0 + 5*SZFREG(fp)
+ FREG_L fa6, OFFSET_RG + DL_OFFSET_RG_FA0 + 6*SZFREG(fp)
+ FREG_L fa7, OFFSET_RG + DL_OFFSET_RG_FA0 + 7*SZFREG(fp)
+#endif
+
+ REG_L ra, 0(fp)
+ REG_L fp, SZREG(fp)
+
+ addi sp, sp, SF_SIZE
+ jr t4
+
+1:
+ # The new frame size is in t3.
+ sub sp, fp, t3
+ andi sp, sp, ALMASK
+
+ REG_S a0, OFFSET_T1(fp)
+
+ mv a0, sp
+ addi a1, fp, SF_SIZE
+ mv a2, t3
+ la t4, memcpy
+ jalr t4
+
+ REG_L t4, OFFSET_T1(fp)
+
+ # Call the function.
+ REG_L a0, OFFSET_RG + DL_OFFSET_RG_A0 + 0*SZREG(fp)
+ REG_L a1, OFFSET_RG + DL_OFFSET_RG_A0 + 1*SZREG(fp)
+ REG_L a2, OFFSET_RG + DL_OFFSET_RG_A0 + 2*SZREG(fp)
+ REG_L a3, OFFSET_RG + DL_OFFSET_RG_A0 + 3*SZREG(fp)
+ REG_L a4, OFFSET_RG + DL_OFFSET_RG_A0 + 4*SZREG(fp)
+ REG_L a5, OFFSET_RG + DL_OFFSET_RG_A0 + 5*SZREG(fp)
+ REG_L a6, OFFSET_RG + DL_OFFSET_RG_A0 + 6*SZREG(fp)
+ REG_L a7, OFFSET_RG + DL_OFFSET_RG_A0 + 7*SZREG(fp)
+
+#ifndef __riscv_float_abi_soft
+ FREG_L fa0, OFFSET_RG + DL_OFFSET_RG_FA0 + 0*SZFREG(fp)
+ FREG_L fa1, OFFSET_RG + DL_OFFSET_RG_FA0 + 1*SZFREG(fp)
+ FREG_L fa2, OFFSET_RG + DL_OFFSET_RG_FA0 + 2*SZFREG(fp)
+ FREG_L fa3, OFFSET_RG + DL_OFFSET_RG_FA0 + 3*SZFREG(fp)
+ FREG_L fa4, OFFSET_RG + DL_OFFSET_RG_FA0 + 4*SZFREG(fp)
+ FREG_L fa5, OFFSET_RG + DL_OFFSET_RG_FA0 + 5*SZFREG(fp)
+ FREG_L fa6, OFFSET_RG + DL_OFFSET_RG_FA0 + 6*SZFREG(fp)
+ FREG_L fa7, OFFSET_RG + DL_OFFSET_RG_FA0 + 7*SZFREG(fp)
+#endif
+ jalr t4
+
+ REG_S a0, OFFSET_SAVED_CALL_A0 + DL_OFFSET_RV_A0(fp)
+ REG_S a1, OFFSET_SAVED_CALL_A0 + DL_OFFSET_RV_A0 + SZREG(fp)
+
+#ifndef __riscv_float_abi_soft
+ FREG_S fa0, OFFSET_SAVED_CALL_A0 + DL_OFFSET_RV_FA0(fp)
+ FREG_S fa1, OFFSET_SAVED_CALL_A0 + DL_OFFSET_RV_FA0 + SZFREG(fp)
+#endif
+
+ # Setup call to pltexit.
+ REG_L a0, OFFSET_SAVED_CALL_A0(fp)
+ REG_L a1, OFFSET_SAVED_CALL_A0 + SZREG(fp)
+ addi a2, fp, OFFSET_RG
+ addi a3, fp, OFFSET_RV
+ la t4, _dl_audit_pltexit
+ jalr t4
+
+ REG_L a0, OFFSET_RV + DL_OFFSET_RV_A0(fp)
+ REG_L a1, OFFSET_RV + DL_OFFSET_RV_A0 + SZREG(fp)
+
+#ifndef __riscv_float_abi_soft
+ FREG_L fa0, OFFSET_RV + DL_OFFSET_RV_FA0(fp)
+ FREG_L fa1, OFFSET_RV + DL_OFFSET_RV_FA0 + SZFREG(fp)
+#endif
+
+ # RA from within La_riscv_reg.
+ REG_L ra, OFFSET_RG + DL_OFFSET_RG_RA(fp)
+ mv sp, fp
+ ADDI sp, sp, SF_SIZE
+ REG_S fp, SZREG(fp)
+
+ jr ra
+
+END (_dl_runtime_profile)
+#endif /* SHARED */
debian/patches/series
View file @ 170e7d68
......@@ -78,6 +78,8 @@ mips/submitted-rld_map.diff
powerpc/local-powerpc8xx-dcbz.diff
riscv64/git-risc-v-add-support-for-dl_runtime_profile.diff
sh4/local-fpscr_values.diff
all/local-alias-et_EE.diff
......
debian/testsuite-xfail-debian.mk
View file @ 170e7d68
......@@ -634,9 +634,6 @@ ifeq ($(config-machine)-$(config-os),riscv64-linux-gnu)
test-xfail-tst-resolv-res_init = yes
test-xfail-tst-resolv-res_init-thread = yes
test-xfail-tst-resolv-threads = yes
# dl_profile is not supported on riscv
test-xfail-tst-sprof-basic = yes
endif
......